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Bernhard Eschermann
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1990 – 1999
- 1996
- [c9]Silke Draber, Bernhard Eschermann:
Dependability Evaluation of a Computing System for Traction Control of Electrical Locomotives. EDCC 1996: 129-140 - 1994
- [c8]Bernhard Eschermann, Hubert D. Kirrmann:
Fail-Safe On-Board Communication for Automatic Train Protection. GI Jahrestagung 1994: 356-363 - 1993
- [b2]Bernhard Eschermann:
Funktionaler Entwurf digitaler Schaltungen - Methoden und CAD-Techniken. Springer-Lehrbuch, Springer 1993, ISBN 978-3-540-56788-2, pp. I-XI, 1-285 - [j5]Bernhard Eschermann:
State Assignment for Hardwired VLSI Control Units. ACM Comput. Surv. 25(4): 415-436 (1993) - [j4]Bernhard Eschermann:
Enhancing on-line testability during synthesis. J. Electron. Test. 4(1): 105-116 (1993) - 1992
- [b1]Bernhard Eschermann:
Testfreundliche Synthese hochintegrierter Schaltungen. Karlsruhe University, Germany, 1992 - [j3]Bernhard Eschermann:
An implicitly testable boundary scan TAP controller. J. Electron. Test. 3(2): 159-169 (1992) - [j2]Bernhard Eschermann:
Synthesis and self-test of random logic control units. Integr. 13(3): 209-230 (1992) - [j1]Bernhard Eschermann, Hans-Joachim Wunderlich:
Optimized synthesis techniques for testable sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(3): 301-312 (1992) - [c7]Bernhard Eschermann:
On Combining Off-Line BIST and On-Line Control Flow Checking. FTCS 1992: 298-305 - 1991
- [c6]Bernhard Eschermann, Hans-Joachim Wunderlich:
A Unified Approach for the Synthesis of Self-Testable Finite State Machines. DAC 1991: 372-377 - [c5]Jürgen Frößl, Bernhard Eschermann:
Module Generation for AND/XOR Fields (XPLAs). ICCD 1991: 26-29 - [c4]Bernhard Eschermann, Hans-Joachim Wunderlich:
Emulation of Scan Paths in Sequential Circuit Synthesis. Fault-Tolerant Computing Systems 1991: 136-147 - 1990
- [c3]Bernhard Eschermann, Hans-Joachim Wunderlich:
Optimized synthesis of self-testable finite state machines. FTCS 1990: 390-397
1980 – 1989
- 1988
- [c2]Bernhard Eschermann, Wayne Wei-Ming Dai, Ernest S. Kuh, Massoud Pedram:
Hierarchical placement for macrocells: a 'meet in the middle' approach. ICCAD 1988: 460-463 - [c1]Rainer Amann, Bernhard Eschermann, Utz G. Baitinger:
PLA based finite state machines using Johnson counters as state memories. ICCD 1988: 267-270
Coauthor Index
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