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Gert Schley
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2010 – 2019
- 2018
- [b1]Gert Schley:
Cross-layer fault tolerance in networks-on-chip. University of Stuttgart, Germany, 2018 - 2017
- [j5]Gert Schley, Atefe Dalirsani, Marcus Eggenberger, Nadereh Hatami, Hans-Joachim Wunderlich, Martin Radetzki:
Multi-Layer Diagnosis for Fault-Tolerant Networks-on-Chip. IEEE Trans. Computers 66(5): 848-861 (2017) - 2016
- [j4]Gert Schley, Ibrahim Ahmed, Muhammad Afzal, Martin Radetzki:
Reconfigurable fault tolerant routing for networks-on-chip with logical hierarchy. Comput. Electr. Eng. 51: 195-206 (2016) - 2015
- [c5]Gert Schley, Martin Radetzki:
Fault Tolerant Routing for Hierarchically Organized Networks-on-Chip. PDP 2015: 379-386 - 2014
- [c4]Atefe Dalirsani, Nadereh Hatami, Michael E. Imhof, Marcus Eggenberger, Gert Schley, Martin Radetzki, Hans-Joachim Wunderlich:
On Covering Structural Defects in NoCs by Functional Tests. ATS 2014: 87-92 - 2013
- [j3]Thomas Canhao Xu, Gert Schley, Pasi Liljeberg, Martin Radetzki, Juha Plosila, Hannu Tenhunen:
Optimal placement of vertical connections in 3D Network-on-Chip. J. Syst. Archit. 59(7): 441-454 (2013) - [c3]Gert Schley, Nikolaos Batzolis, Martin Radetzki:
Fault Localizing End-to-End Flow Control Protocol for Networks-on-Chip. PDP 2013: 454-461 - 2011
- [c2]Bastian Haetzer, Gert Schley, Rauf Salimi Khaligh, Martin Radetzki:
Practical embedded systems engineering syllabus for graduate students with multidisciplinary backgrounds. WESE 2011: 1-8 - [c1]Gert Schley, Martin Radetzki:
Optimal distribution of privileged nodes in networks-on-chip. WISES 2011: 87-92 - 2010
- [j2]Gert Schley, Martin Radetzki, Adán Kohler:
Degradability Enabled Routing for Network-on-Chip Switches (Routingverfahren zur Unterstützung der Degradierbarkeit von Network-on-Chip Switches). it Inf. Technol. 52(4): 201-208 (2010) - [j1]Adán Kohler, Gert Schley, Martin Radetzki:
Fault Tolerant Network on Chip Switching With Graceful Performance Degradation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(6): 883-896 (2010)
Coauthor Index
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