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Abu Khari bin A'Ain
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2020 – today
- 2021
- [j14]Muhammad I. Masud, Abu Khari bin A'Ain, Iqbal A. Khan, Nasir Shaikh-Husin:
CNTFET based Voltage Mode MISO Active only Biquadratic Filter for Multi-GHz Frequency Applications. Circuits Syst. Signal Process. 40(10): 4721-4740 (2021) - 2020
- [c8]Arbab Alamgir, Abu Khari bin A'Ain, Norlina Paraman, Usman Ullah Sheikh
, Ian Andrew Grout:
A comparative analysis of LFSR cascading for hardware efficiency and high fault coverage in BIST applications. ATS 2020: 1-5
2010 – 2019
- 2019
- [j13]Arbab Alamgir
, Abu Khari bin A'Ain, Usman Ullah Sheikh
, Norlina Paraman, Musa Mohd Mokji, Ian Andrew Grout:
Multiple Controlled Antirandom Testing (MCAT) for High Fault Coverage in a Black Box Environment. IEEE Access 7: 117246-117257 (2019) - 2018
- [j12]Arbab Alamgir
, Abu Khari bin A'Ain
, Norlina Paraman
, Usman Ullah Sheikh
, Ian Andrew Grout:
Horizontal diversity in test generation for high fault coverage. Turkish J. Electr. Eng. Comput. Sci. 26(6): 3259-3274 (2018) - [c7]Muhaned Zaidi
, Ian Andrew Grout, Abu Khari A'Ain:
Evaluation of compensation techniques for CMOS operational amplifier design. ICICDT 2018: 5-8 - 2017
- [c6]Muhaned Zaidi
, Ian Andrew Grout, Abu Khari bin A'Ain:
Pole-zero estimation and analysis of op-amp design with negative Miller compensation. MOCAST 2017: 1-4 - 2016
- [j11]Sahar Sarafi, Abu Khari bin A'Ain, Javad Abbaszadeh
:
Low-Voltage CMOS Switch for High-Speed Rail-To-Rail Sampling. Circuits Syst. Signal Process. 35(3): 771-790 (2016) - 2015
- [j10]Sahar Sarafi, Abu Khari bin A'Ain, Javad Abbaszadeh
, Amin Chegini:
Pre-charge solution for low-power, area-efficient SAR ADC. IEICE Electron. Express 12(20): 20150546 (2015) - 2014
- [j9]Sahar Sarafi, Kheyrollah Hadidi, Ebrahim Abbaspour, Abu Khari bin A'Ain, Javad Abbaszadeh
:
100 MS/S, 10-Bit ADC using Pipelined Successive Approximation. J. Circuits Syst. Comput. 23(5) (2014) - [j8]Sahar Sarafi, Abu Khari bin A'Ain, Javad Abbaszadeh
:
High-linear, energy-efficient and area-efficient switching algorithm for high-speed SAR ADCs. Microelectron. J. 45(3): 288-296 (2014) - [j7]Hojjat Babaei Kia, Abu Khari A'Ain:
A Wide Tuning Range Voltage Controlled Oscillator with a High Tunable Active Inductor. Wirel. Pers. Commun. 79(1): 31-41 (2014) - [j6]Hojjat Babaei Kia, Abu Khari A'Ain:
A High Gain and Low Flicker Noise CMOS Mixer with Low Flicker Noise Corner Frequency Using Tunable Differential Active Inductor. Wirel. Pers. Commun. 79(1): 599-610 (2014) - 2013
- [j5]Mahdiar Hosein Ghadiry, Mahdieh Nadi Senjani
, Abu Khari A'Ain:
DLPA: Discrepant Low PDP 8-Bit Adder. Circuits Syst. Signal Process. 32(1): 1-14 (2013) - [j4]Hojjat Babaei Kia, Abu Khari A'Ain, Ian Andrew Grout, Izam Kamisian:
A Reconfigurable Low-Noise Amplifier Using a Tunable Active Inductor for Multistandard Receivers. Circuits Syst. Signal Process. 32(3): 979-992 (2013) - 2012
- [j3]Ian Andrew Grout, Abu Khari bin A'Ain:
The Development of an Online Support Tool for the Teaching and Learning of the IEEE Standard 1500 for Embedded Core-based Integrated Circuits. Int. J. Online Eng. 8(4): 42-49 (2012) - [c5]Ian Andrew Grout, Abu Khari bin A'Ain:
Internet based support tool for the teaching and learning of the IEEE standard 1500 for embedded core-based integrated circuits. EDUCON 2012: 1-6 - 2011
- [j2]Mahdiar Hosein Ghadiry, Abu Khari A'Ain, Mahdieh Nadi Senjani:
Design and Analysis of a Novel Low PDP Full Adder Cell. J. Circuits Syst. Comput. 20(3): 439-445 (2011)
2000 – 2009
- 2008
- [j1]Ler Chun Lee, Abu Khari bin A'Ain, Albert Victor Kordesch:
Design of CMOS Tunable Image-Rejection Low-Noise Amplifier with Active Inductor. VLSI Design 2008: 479173:1-479173:6 (2008) - 2006
- [c4]Ler Chun Lee, Abu Khari bin A'Ain, Albert Victor Kordesch:
A 2.4-GHz CMOS Tunable Image-Rejection Low-Noise Amplifier with Active Inductor. APCCAS 2006: 1679-1682
1990 – 1999
- 1996
- [c3]Abu Khari bin A'Ain, A. H. Bratt, A. P. Dorey:
Testing Analogue Circuits by A C Power Supply Voltage. VLSI Design 1996: 238-241 - 1995
- [c2]Abu Khari bin A'Ain, A. H. Bratt, A. P. Dorey:
On the development of power supply voltage control testing technique for analogue circuits. Asian Test Symposium 1995: 133-139 - [c1]Abu Khari bin A'Ain, A. H. Bratt, A. P. Dorey:
Exposing floating gate defects in analogue CMOS circuits by power supply voltage control testing technique. VLSI Design 1995: 239-242
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