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ORCIDKoh Yamanaga
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2010 – 2019
- 2014
[j4]Koh Yamanaga, Shiho Hagiwara, Ryo Takahashi, Kazuya Masu
, Takashi Sato:
State-Dependence of On-Chip Power Distribution Network Capacitance. IEICE Trans. Electron. 97-C(1): 77-84 (2014)- 2011
- [c3]Tetsuro Miyakawa, Koh Yamanaga, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato:
Acceleration of random-walk-based linear circuit analysis using importance sampling. ACM Great Lakes Symposium on VLSI 2011: 211-216 - 2010
- [j3]Koh Yamanaga, Shuhei Amakawa, Kazuya Masu, Takashi Sato:
A Universal Equivalent Circuit Model for Ceramic Capacitors. IEICE Trans. Electron. 93-C(3): 347-354 (2010) - [j2]Shiho Hagiwara, Koh Yamanaga, Ryo Takahashi, Kazuya Masu, Takashi Sato:
Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2409-2416 (2010) - [c2]Shiho Hagiwara, Koh Yamanaga, Ryo Takahashi, Kazuya Masu, Takashi Sato:
Linear time calculation of state-dependent power distribution network capacitance. ISQED 2010: 75-80 - [c1]Koh Yamanaga, Kazuya Masu, Takashi Sato:
Application of generalized scattering matrix for prediction of power supply noise. SLIP 2010: 83-90
2000 – 2009
- 2009
- [j1]Koh Yamanaga, Takashi Sato, Kazuya Masu:
2-Port Modeling Technique for Surface-Mount Passive Components Using Partial Inductance Concept. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 976-982 (2009)
Coauthor Index
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