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ORCIDTimo Schönwald
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2010 – 2019
- 2013
[b1]Timo Schönwald:
Applikationsspezifische Optimierung der Kommunikation in Mehrkern-Architekturen für eingebettete Systeme. Eberhard Karls University of Tübingen, Verlag Dr. Hut 2013- [c9]Timo Schönwald, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel:
Shared memory aware MPSoC software deployment. DATE 2013: 1771-1776 - 2012
- [c8]Timo Schönwald, Alexander Koch, Benjamin Ranft, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel:
Stereo depth map computation on a Tilera TILEPro64 embedded multicore processor. DASIP 2012: 1-2 - [c7]Timo Schönwald, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel:
Distance-Constrained Force-Directed Process Mapping for MPSoC Architectures. DSD 2012: 592-599 - [c6]Timo Schönwald, Benjamin Ranft, Oliver Bringmann, Wolfgang Rosenstiel:
Latency-Optimized Force-directed Process Mapping for MPSoC Architectures. MBMV 2012: 145-156 - [c5]Timo Schönwald, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel:
Optimized software mapping for advanced driver assistance systems. SIES 2012: 181-190 - 2011
- [c4]Benjamin Ranft, Timo Schönwald, Bernd Kitt:
Parallel matching-based estimation - a case study on three different hardware architectures. Intelligent Vehicles Symposium 2011: 1060-1067
2000 – 2009
- 2009
- [c3]Timo Schönwald, Jochen Zimmermann, Oliver Bringmann, Wolfgang Rosenstiel:
Network-on-Chip Architecture Exploration Framework. DSD 2009: 375-382 - 2007
- [c2]Timo Schönwald, Jochen Zimmermann, Oliver Bringmann, Wolfgang Rosenstiel:
Fully Adaptive Fault-Tolerant Routing Algorithm for Network-on-Chip Architectures. DSD 2007: 527-534 - 2006
- [c1]Alexander Viehl, Timo Schönwald, Oliver Bringmann, Wolfgang Rosenstiel:
Formal performance analysis and simulation of UML/SysML models for ESL design. DATE 2006: 242-247
Coauthor Index
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