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2000 – 2009
- 2005
[c10]Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä:
A Compact MD5 and SHA-1 Co-Implementation Utilizing Algorithm Similarities. ERSA 2005: 48-54- [c9]Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä:
Hardware Implementation Analysis of the MD5 Hash Algorithm. HICSS 2005 - 2004
- [c8]Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä:
A VHDL Generator for Elliptic Curve Cryptography. FPL 2004: 1098-1100 - [c7]Kimmo Järvinen, Matti Tommiska, Jorma Skyttä:
A scalable architecture for elliptic curve point multiplication. FPT 2004: 303-306 - [c6]Antti Hämäläinen, Matti Tommiska, Jorma Skyttä:
FPGA-Based Implementation of a 59-Neuron Feedforward Neural Network with a 17.1 Gbps Interlayer Throughput. IC-AI 2004: 181-187 - 2003
- [c5]Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä:
A fully pipelined memoryless 17.8 Gbps AES-128 encryptor. FPGA 2003: 207-215 - 2002
- [c4]Antti Hämäläinen, Matti Tommiska, Jorma Skyttä:
8 Gigabits per Second Implementation of the IDEA Cryptographic Algorithm. FPL 2002: 760-769 - 2001
- [c3]Matti Tommiska, Jorma Skyttä:
Dijkstra's Shortest Path Routing Algorithm in Reconfigurable Hardware. FPL 2001: 653-657 - [c2]Matti Tommiska, Jarno M. A. Tanskanen, Jorma O. Skyttä:
Hardware-based adaptive general parameter extension in W-CDMA power control. VTC Fall 2001: 2023-2027
1990 – 1999
- 1999
- [j1]Matti Tommiska, Mika Loukola, Tero Koskivirta:
An FPGA-based implementation and simulation of the AAL type 2 receiver. J. Commun. Networks 1(1): 63-67 (1999) - [c1]Matti Tommiska:
Special Arithmetic Operations on FPGAs. FPGA 1999: 253
Coauthor Index
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