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ORCIDVesselina K. Papazova
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Journal Articles
- 2020
[j5]Anthony Saporito, Martin Recktenwald, Christian Jacobi, Gerrit Koch, Deanna Postles Dunn Berger, Robert J. Sonnelitter, Craig R. Walters
, Jang-Soo Lee, Cédric Lichtenau, Ulrich Mayer, Eduard Herkel, Stefan Payer, Silvia M. Müller, Vesselina K. Papazova, Ekaterina M. Ambroladze, Timothy C. Bronson:
Design of the IBM z15 microprocessor. IBM J. Res. Dev. 64(5/6): 7:1-7:18 (2020)- 2018
- [j4]Christian Jacobi, Anthony Saporito, Martin Recktenwald, Aaron Tsai, Ulrich Mayer, Markus M. Helms, Adam Collura, Pak-kin Mak, Robert J. Sonnelitter, Michael A. Blake, Tim Bronson, Arthur O'neill, Vesselina K. Papazova:
Design of the IBM z14 microprocessor. IBM J. Res. Dev. 62(2/3): 8:1-8:11 (2018) - 2015
- [j3]Craig R. Walters, Pak-kin Mak, Deanna Postles Dunn Berger, Michael A. Blake, Tim Bronson, K. D. Klapproth, A. J. O'Neill, Robert J. Sonnelitter, Vesselina K. Papazova:
The IBM z13 processor cache subsystem. IBM J. Res. Dev. 59(4/5) (2015) - 2012
- [j2]Patrick J. Meaney, Luis Alfonso Lastras-Montaño, Vesselina K. Papazova, Eldee Stephens, J. S. Johnson, Luiz C. Alves, James A. O'Connor, William J. Clarke:
IBM zEnterprise redundant array of independent memory subsystem. IBM J. Res. Dev. 56(1): 4 (2012) - 2004
- [j1]Pak-kin Mak, Gary E. Strait, Michael A. Blake, Kevin W. Kark, Vesselina K. Papazova, A. E. (Rick) Seigler, Gary A. Van Huben, Liyong Wang, George C. Wellwood:
Processor subsystem interconnect architecture for a large symmetric multiprocessing system. IBM J. Res. Dev. 48(3-4): 323-338 (2004)
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