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ORCIDSheng Wang 0005
Person information
- affiliation: Zhejiang University, Institute of VLSI Design, Hangzhou, China
Other persons with the same name
- Sheng Wang — disambiguation page
- Sheng Wang 0001
![[0000-0003-4210-1670]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-4210-1670")
— Toyota Technological Institute at Chicago, IL, USA (and 1 more) - Sheng Wang 0002 — Coventry University, UK
- Sheng Wang 0003 — University of Technology at Sydney, NSW, Australia
- Sheng Wang 0004 — Hunan Institute of Technology, Hengyang, China
- Sheng Wang 0006 — University of Electronic Science and Technology of China, Key Lab of Broadband Optical Fiber Transmission and Communication Networks, Chengdu, China
- Sheng Wang 0007 — Wuhan University, School of Computer Science, Wuhan, China (and 2 more)
- Sheng Wang 0008 — Shandong University, School of Mathematics and Statistics, Weihai, China
- Sheng Wang 0009 — Oklahoma State University, School of Electrical and Computer Engineering, Stillwater, OK, USA
- Sheng Wang 0010 — Tsinghua University, Department of Precision Instruments, Beijing, China
- Sheng Wang 0011 — Alibaba Cloud, Singapore (and 2 more)
- Sheng Wang 0012 — University of Washington, Seattle, WA, USA (and 2 more)
- Sheng Wang 0013 — Huazhong University of Science and Technology, Wuhan, Hubei, China
- Sheng Wang 0014 — Shanghai Jiao Tong University, School of Biomedical Engineering, Institute for Medical Imaging Technology, Shanghai, China (and 1 more)
- Sheng Wang 0015 — Zhengzhou University of Aeronautics, China (and 2 more)
- Sheng Wang 0016 — Wenzhou Medical University, Eye Hospital, Wenzhou, China
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2010 – 2019
- 2018
[j3]Yande Xiang, Jiahui Luo, Tao-Tao Zhu, Sheng Wang, Xiaoyan Xiang, Jianyi Meng:
ECG-Based Heartbeat Classification Using Two-Level Convolutional Neural Network and RR Interval Difference. IEICE Trans. Inf. Syst. 101-D(4): 1189-1198 (2018)- 2017
- [j2]Sheng Wang, Chen Chen, Xiaoyan Xiang, Jianyi Meng:
A metastability-immune error-resilient flip-flop for near-threshold variation-tolerant designs. IEICE Electron. Express 14(11): 20170353 (2017) - [j1]Sheng Wang, Chen Chen, Xiaoyan Xiang, Jian-Yi Meng:
A Variation-Tolerant Near-Threshold Processor With Instruction-Level Error Correction. IEEE Trans. Very Large Scale Integr. Syst. 25(7): 1993-2006 (2017) - [c2]Xiaopei Chen, Sheng Wang, Xiaoyan Xiang, Chen Chen, Jianyi Meng:
A light-weight energy-efficient resilient circuit for variation tolerance. ASICON 2017: 815-818 - 2015
- [c1]Sheng Wang, Xiaoyan Xiang, Chen Chen, Jianyi Meng:
An energy-efficient microprocessor using multilevel error correction for timing error tolerance. ASICON 2015: 1-4
Coauthor Index
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