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2020 – today
- 2023
[c4]Gabriel H. Loh
, Michael J. Schulte, Mike Ignatowski, Vignesh Adhinarayanan, Shaizeen Aga, Derrick Aguren, Varun Agrawal, Ashwin M. Aji, Johnathan Alsop, Paul T. Bauman, Bradford M. Beckmann, Majed Valad Beigi, Sergey Blagodurov, Travis Boraten, Michael Boyer, William C. Brantley, Noel Chalmers, Shaoming Chen, Kevin Cheng, Michael L. Chu, David Cownie, Nicholas Curtis, Joris Del Pino, Nam Duong, Alexandru Dutu, Yasuko Eckert, Christopher Erb, Chip Freitag, Joseph L. Greathouse, Sudhanva Gurumurthi, Anthony Gutierrez, Khaled Hamidouche, Sachin Hossamani, Wei Huang, Mahzabeen Islam, Nuwan Jayasena, John Kalamatianos, Onur Kayiran, Jagadish Kotra, Alan Lee, Daniel Lowell, Niti Madan, Abhinandan Majumdar, Nicholas Malaya, Srilatha Manne, Susumu Mashimo, Damon McDougall, Elliot Mednick, Michael Mishkin, Mark Nutter, Indrani Paul, Matthew Poremba, Brandon Potter, Kishore Punniyamurthy, Sooraj Puthoor, Steven E. Raasch, Karthik Rao, Gregory Rodgers, Marko Scrbak, Mohammad Seyedzadeh, John Slice, Vilas Sridharan, René van Oostrum, Eric Van Tassell, Abhinav Vishnu, Samuel Wasmundt, Mark Wilkening, Noah Wolfe, Mark Wyse, Adithya Yalavarti, Dmitri Yudanov:
A Research Retrospective on AMD's Exascale Computing Journey. ISCA 2023: 81:1-81:14
2010 – 2019
- 2013
- [j1]Nam Duong, Alexander V. Veidenbaum:
Compiler-Assisted, Selective Out-Of-Order Commit. IEEE Comput. Archit. Lett. 12(1): 21-24 (2013) - 2012
- [c3]Nam Duong, Taesu Kim, Dali Zhao, Alexander V. Veidenbaum:
Revisiting level-0 caches in embedded processors. CASES 2012: 171-180 - [c2]Nam Duong, Dali Zhao, Taesu Kim, Rosario Cammarota, Mateo Valero, Alexander V. Veidenbaum:
Improving Cache Management Policies Using Dynamic Reuse Distances. MICRO 2012: 389-400
2000 – 2009
- 2009
- [c1]Nam Duong, Rakesh Kumar:
Register Multimapping: A technique for reducing register bank conflicts in processors with large register files. SASP 2009: 50-53
Coauthor Index
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