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Hai Lin 0004
Person information
- affiliation: University of Connecticut, Storrs, CT, USA
Other persons with the same name
- Hai Lin — disambiguation page
- Hai Lin 0001 — Osaka Prefecture University, Department of Electrical and Information Systems, Japan
- Hai Lin 0002 — University of Notre Dame, IN, USA (and 1 more)
- Hai Lin 0003 — Zhejiang University, State Key Laboratory of CAD&CG, China
- Hai Lin 0005 — Clarkson University, Potsdam, NY, USA
- Hai Lin 0006 — Wuhan University, School of Cyber Science and Engineering, MoE Key Laboratory of Aerospace Information Security and Trusted Computing, China (and 2 more)
- Hai Lin 0007 — University of Colorado Denver, Department of Chemistry, CO, USA (and 2 more)
- Hai Lin 0008 — Jilin University, College of Computer Science and Technology, Changchun, China
- Hai Lin 0009 — Central China Normal University, College of Physical Science and Technology, Wuhan, China (and 3 more)
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2010 – 2019
- 2012
- [j4]Hai Lin, Yunsi Fei:
Resource Sharing of Pipelined Custom Hardware Extension for Energy-Efficient Application-Specific Instruction Set Processor Design. ACM Trans. Design Autom. Electr. Syst. 17(4): 39:1-39:20 (2012) - [j3]Xuan Guan, Yunsi Fei, Hai Lin:
Hierarchical Design of an Application-Specific Instruction Set Processor for High-Throughput and Scalable FFT Processing. IEEE Trans. Very Large Scale Integr. Syst. 20(3): 551-563 (2012) - 2010
- [j2]Hai Lin, Yunsi Fei, Xuan Guan, Zhijie Jerry Shi:
Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction-Set Processors. IEEE Trans. Very Large Scale Integr. Syst. 18(11): 1519-1532 (2010) - [c9]Hai Lin, Yunsi Fei:
A novel multi-objective instruction synthesis flow for application-specific instruction set processors. ACM Great Lakes Symposium on VLSI 2010: 409-412 - [c8]Hai Lin, Yunsi Fei:
Exploring custom instruction synthesis for application-specific instruction set processors with multiple design objectives. ISLPED 2010: 141-146
2000 – 2009
- 2009
- [j1]Hai Lin, Yunsi Fei:
Orchestrating Horizontal Parallelism and Vertical Instruction Packing of Programs to Improve System Overall Efficiency. IEEE Trans. Computers 58(9): 1211-1220 (2009) - [c7]Xuan Guan, Hai Lin, Yunsi Fei:
Design of an application-specific instruction set processor for high-throughput and scalable FFT. DATE 2009: 1302-1307 - [c6]Hai Lin, Yunsi Fei:
Resource sharing of pipelined custom hardware extension for energy-efficient application-specific instruction set processor design. ICCD 2009: 158-165 - [c5]Xuan Guan, Yunsi Fei, Hai Lin:
A Hierarchical Design of an Application-specific Instruction Set Processor for High-throughput FFT. ISCAS 2009: 2513-2516 - 2008
- [c4]Hai Lin, Yunsi Fei:
Harnessing Horizontal Parallelism and Vertical Instruction Packing of Programs to Improve System Overall Efficiency. DATE 2008: 758-763 - [c3]Hai Lin, Guangyu Sun, Yunsi Fei, Yuan Xie, Anand Sivasubramaniam:
Thermal-aware Design Considerations for Application-Specific Instruction Set Processor. SASP 2008: 63-68 - 2007
- [c2]Hai Lin, Yunsi Fei:
Utilizing custom registers in application-specific instruction set processors for register spills elimination. ACM Great Lakes Symposium on VLSI 2007: 323-328 - [c1]Hai Lin, Xuan Guan, Yunsi Fei, Zhijie Jerry Shi:
Compiler-assisted architectural support for program code integrity monitoring in application-specific instruction set processors. ICCD 2007: 187-193
Coauthor Index
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