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ORCIDLiang Ma 0003
Person information
- affiliation: Politecnico di Torino, Department of Electronics and Telecommunications, Turin, Italy
Other persons with the same name
- Liang Ma — disambiguation page
- Liang Ma 0001
![[0000-0002-9422-814X]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-9422-814X")
— Tsinghua University, Department of Industrial Engineering, Beijing, China (and 1 more) - Liang Ma 0002 — IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA (and 1 more)
- Liang Ma 0004 — Zhejiang University, State Key Laboratory of Industrial Control Technology, College of Control Science and Engineering, Hangzhou, China
- Liang Ma 0005 — Huawei Technology Company, Ltd., Shanghai Institution, China
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2020 – today
- 2020
[j3]Arslan Arif, Felipe A. Barrigon, Francesco Gregoretti, Javed Iqbal, Luciano Lavagno, Mihai Teodor Lazarescu, Liang Ma, Manuel Palomino, Javier L. L. Segura:
Performance and energy-efficient implementation of a smart city application on FPGAs. J. Real Time Image Process. 17(3): 729-743 (2020)
2010 – 2019
- 2019
- [b1]Liang Ma:
Low power and high performance heterogeneous computing on FPGAs. Polytechnic University of Turin, Italy, 2019 - [c4]Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer:
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. FPGA 2019: 23-32 - [c3]Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek:
Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration. ICCAD 2019: 1-8 - 2018
- [i1]Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer:
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. CoRR abs/1811.08634 (2018) - 2017
- [j2]Fahad Bin Muslim, Liang Ma, Mehdi Roozmeh, Luciano Lavagno:
Efficient FPGA Implementation of OpenCL High-Performance Computing Applications via High-Level Synthesis. IEEE Access 5: 2747-2762 (2017) - [j1]Liang Ma, Luciano Lavagno, Mihai Teodor Lazarescu, Arslan Arif:
Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis. IEEE Access 5: 18953-18974 (2017) - 2016
- [c2]Liang Ma, Fahad Bin Muslim, Luciano Lavagno:
High Performance and Low Power Monte Carlo Methods to Option Pricing Models via High Level Design and Synthesis. EMS 2016: 157-162 - [c1]Fahad Bin Muslim, Alexandros Demian, Liang Ma, Luciano Lavagno, Affaq Qamar:
Energy-efficient FPGA Implementation of the k-Nearest Neighbors Algorithm Using OpenCL. FedCSIS (Position Papers) 2016: 141-145
Coauthor Index
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