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Ronald D. Hindmarsh

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Conference and Workshop Papers

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1994
[c3]
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Markus Theißinger, Ronald D. Hindmarsh:
Layout optimization of planar CMOS cells regarding width-to-height trade-off. EURO-DAC 1994: 48-53
1993
[c2]
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Ronald D. Hindmarsh:
JOGM: A CMOS cell layout style using jogged transistor gates. EURO-DAC 1993: 184-188
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Ronald D. Hindmarsh:
Complex Gate Performance Improvement by Jog Insertion into Transistor Gates. ICCD 1993: 543-546

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