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ORCIDNikolaos Moschopoulos
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2020 – today
- 2020
[j8]Constantinos Efstathiou
, Kiamal Z. Pekmestzi, Nikolaos Moschopoulos:
On the Diminished-1 Modulo 2n+1 Addition and Subtraction. J. Circuits Syst. Comput. 29(5): 2030005:1-2030005:14 (2020)
2010 – 2019
- 2016
- [j7]Kostas Tsoumanis, Nicholas Axelos, Nikolaos Moschopoulos, Georgios Zervakis, Kiamal Z. Pekmestzi:
Pre-Encoded Multipliers Based on Non-Redundant Radix-4 Signed-Digit Encoding. IEEE Trans. Computers 65(2): 670-676 (2016) - 2014
- [j6]Constantinos Efstathiou, Nikos K. Moshopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi:
Efficient modulo 2n+1 multiply and multiply-add units based on modified Booth encoding. Integr. 47(1): 140-147 (2014) - [j5]Kostas Tsoumanis, Sotirios Xydis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi:
An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(4): 1133-1143 (2014) - 2013
- [j4]Costas Efstathiou, Nikolaos Moschopoulos, Ioannis Voyiatzis, Kiamal Z. Pekmestzi:
On the design of modulo 2n + 1 dot product and generalized multiply-add units. Comput. Electr. Eng. 39(2): 410-419 (2013) - [c8]Kiamal Z. Pekmestzi, Constantinos Efstathiou, Nikolaos Moschopoulos, Kostas Tsoumanis:
Efficient modulo 2n+1 multiplication for the idea block cipher. ACM Great Lakes Symposium on VLSI 2013: 263-268 - [c7]Kostas Tsoumanis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi:
On the design of modulo 2n±1 residue generators. VLSI-SoC 2013: 33-38 - 2012
- [c6]Constantinos Efstathiou, Nikolaos Moschopoulos, Kostas Tsoumanis, Kiamal Z. Pekmestzi:
On the Design of Configurable Modulo 2n±1 Residue Generators. DSD 2012: 50-56 - 2010
- [c5]Nicholas Axelos, Kiamal Z. Pekmestzi, Nikolaos Moschopoulos:
A New Low-Power Soft-Error Tolerant SRAM Cell. ISVLSI 2010: 399-404 - [c4]Isidoros Sideris, Nikos K. Moshopoulos, Kiamal Z. Pekmestzi:
A hardware peripheral for Java bytecodes translation acceleration. SAC 2010: 552-553
2000 – 2009
- 2008
- [j3]Lambros Sarakis, Nikos K. Moshopoulos, Dimitrios Loukatos, Kostas Marinis, Panagiotis Stathopoulos, Nikolas Mitrou:
A versatile timing unit for traffic shaping, policing and charging in packet-switched networks. J. Syst. Archit. 54(5): 491-506 (2008) - [c3]Kiamal Z. Pekmestzi, Nicholas Axelos, Isidoros Sideris, Nikos K. Moshopoulos:
A BISR Architecture for Embedded Memories. IOLTS 2008: 149-154 - 2002
- [j2]Kiamal Z. Pekmestzi, Nikos K. Moshopoulos:
A Systolic, High Speed Architecture for an RSA Cryptosystem. J. VLSI Signal Process. 32(3): 223-235 (2002) - 2001
- [j1]Kiamal Z. Pekmestzi, Nikos K. Moshopoulos:
A bit-interleaved systolic architecture for a high-speed RSA system. Integr. 30(2): 169-175 (2001) - [c2]Kostas Marinis, Nikos K. Moshopoulos, Fotis Karoubalis, Kiamal Z. Pekmestzi:
On the Hardware Implementation of the 3GPP Confidentiality and Integrity Algorithms. ISC 2001: 248-265 - [c1]Nikos K. Moshopoulos, Kiamal Z. Pekmestzi:
A Novel Systolic Architecture for Efficient RSA Implementation. Public Key Cryptography 2001: 416-421
Coauthor Index
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