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Journal Articles
- 2012
[j4]Masanori Kurimoto, Jun Matsushima, Shigeki Ohbayashi, Yoshiaki Fukui, Michio Komoda, Nobuhiro Tsuda:
A Yield and Reliability Improvement Methodology Based on Logic Redundant Repair with a Repairable Scan Flip-Flop Designed by Push Rule. ACM Trans. Design Autom. Electr. Syst. 17(2): 17:1-17:22 (2012)- [j3]Masanori Kurimoto, Takeshi Yamamoto, Satoshi Nakano, Atsuto Hanami, Hiroyuki Kondo:
Verification work reduction methodology in low-power chip implementation. ACM Trans. Design Autom. Electr. Syst. 18(1): 12:1-12:15 (2012) - 2010
- [j2]Masanori Kurimoto, Hiroaki Suzuki, Rei Akiyama, Tadao Yamanaka, Haruyuki Ohkuma, Hidehiro Takata, Hirofumi Shinohara:
Phase-adjustable error detection flip-flops with 2-stage hold-driven optimization, slack-based grouping scheme and slack distribution control for dynamic voltage scaling. ACM Trans. Design Autom. Electr. Syst. 15(2): 17:1-17:17 (2010) - 2009
- [j1]Mitsuya Fukazawa, Masanori Kurimoto, Rei Akiyama, Hidehiro Takata, Makoto Nagata
:
Experimental Evaluation of Dynamic Power Supply Noise and Logical Failures in Microprocessor Operations. IEICE Trans. Electron. 92-C(4): 475-482 (2009)
Conference and Workshop Papers
- 2011
- [c4]Masanori Kurimoto, Yasuhiko Takahashi, Yuji Fujiwara, Mamoru Sakugawa, Souichi Kobayashi, Hiroyuki Kondo:
System performance and energy consumption improvement methodology by delay adjustable synchronizer. A-SSCC 2011: 393-396 - 2010
- [c3]Masanori Kurimoto, Jun Matsushima, Shigeki Ohbayashi, Yoshiaki Fukui:
A yield improvement methodology based on logic redundant repair with a repairable scan flip-flop designed by push rule. ISQED 2010: 184-190 - 2008
- [c2]Masanori Kurimoto, Hiroaki Suzuki, Rei Akiyama, Tadao Yamanaka, Haruyuki Ohkuma, Hidehiro Takata, Hirofumi Shinohara:
Phase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling. DAC 2008: 884-889 - [c1]Hiroaki Suzuki, Masanori Kurimoto, Tadao Yamanaka, Hidehiro Takata, Hiroshi Makino, Hirofumi Shinohara:
Post-silicon programmed body-biasing platform suppressing device variability in 45 nm CMOS technology. ISLPED 2008: 15-20
Coauthor Index
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