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ORCIDGunjan Mandal
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2020 – today
- 2020
[c6]Gunjan Mandal, Sunil Rajan, Sanjeeb Kumar Ghosh, Saikat Hazra, Raghavendra Molthati, Parin Rajnikant Bhuta, Santosh Kumar Reddy, Vishnu Kalyanamahadevi Gopalan Jawarlal, Sumanth Chakkirala, Avneesh Singh Verma, Umamaheswara Reddy Katta, Venugopal Sadana, Dayakar Bethi, Abul Hassan Savanur, Praveen S. Bharadwaj, Krupal Jitendra Mehta, Kuntal Pandya:
A 2.68mW/Gbps, 1.62-8.1Gb/s Receiver for Embedded DisplayPort Version1.4b to Support 14dB Channel Loss. A-SSCC 2020: 1-4
2010 – 2019
- 2011
- [j2]Jonathan Borremans, Gunjan Mandal, Vito Giannini
, Björn Debaillie, Mark Ingels, Tomohiro Sano, Bob Verbruggen, Jan Craninckx:
A 40 nm CMOS 0.4-6 GHz Receiver Resilient to Out-of-Band Blockers. IEEE J. Solid State Circuits 46(7): 1659-1671 (2011) - [c5]Jonathan Borremans, Gunjan Mandal, Vito Giannini, Tomohiro Sano, Mark Ingels, Bob Verbruggen, Jan Craninckx:
A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers. ISSCC 2011: 62-64 - 2010
- [j1]Mark Ingels, Vito Giannini, Jonathan Borremans, Gunjan Mandal, Björn Debaillie, Peter Van Wesemael, Tomohiro Sano, Takaya Yamamoto, Dries Hauspie, Joris Van Driessche, Jan Craninckx:
A 5 mm2 40 nm LP CMOS Transceiver for a Software-Defined Radio Platform. IEEE J. Solid State Circuits 45(12): 2794-2806 (2010) - [c4]Jonathan Borremans, Gunjan Mandal, Björn Debaillie, Vito Giannini, Jan Craninckx:
A sub-3dB NF voltage-sampling front-end with +18dBm IIP3 and +2dBm blocker compression point. ESSCIRC 2010: 402-405 - [c3]Mark Ingels, Vito Giannini, Jonathan Borremans, Gunjan Mandal, Björn Debaillie, Peter Van Wesemael, Tomohiro Sano, Takaya Yamamoto, Dries Hauspie, Joris Van Driessche, Jan Craninckx:
A 5mm2 40nm LP CMOS 0.1-to-3GHz multistandard transceiver. ISSCC 2010: 458-459
2000 – 2009
- 2005
- [c2]Gunjan Mandal, Pradip Mandal:
Low-power LVDS receiver for 1.3Gbps physical layer (PHY) interface. ISCAS (3) 2005: 2180-2183 - 2004
- [c1]Gunjan Mandal, Pradip Mandal:
Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation. ISCAS (1) 2004: 1120-1123
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