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2020 – today
- 2023
[c8]Bharat Sukhwani
, Mohit Kapur, Alda Ohmacht, Liran Schour, Martin Ohmacht, Chris Ward, Chuck Haymes, Sameh W. Asaad:
Janus: An Experimental Reconfigurable SmartNIC with P4 Programmability and SDN Isolation. FPGA 2023: 230
2010 – 2019
- 2017
- [c7]Bharat Sukhwani, Thomas Roewer, Charles L. Haymes, Kyu-Hyoun Kim, Adam J. McPadden, Daniel M. Dreps, Dean Sanner, Jan van Lunteren, Sameh W. Asaad:
Contutto: a novel FPGA-based prototyping platform enabling innovation in the memory subsystem of a server class processor. MICRO 2017: 15-26 - 2014
- [c6]Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser, Jeff Kusnitz, Rathinakumar Appuswamy, Chuck Haymes, Bernard Brezzo, Roger Moussalli, Ralph Bellofatto, Christian W. Baks, Michael Mastro, Kai Schleupen, Charles E. Cox, Ken Inoue, Steven E. Millman, Nabil Imam, Emmett McQuinn, Yutaka Y. Nakamura, Ivan Vo, Chen Guok, Don Nguyen, Scott Lekuch, Sameh W. Asaad, Daniel J. Friedman, Bryan L. Jackson, Myron Flickner, William P. Risk, Rajit Manohar, Dharmendra S. Modha:
Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution. SC 2014: 27-38 - 2012
- [c5]Sameh W. Asaad, Ralph Bellofatto, Bernard Brezzo, Chuck Haymes, Mohit Kapur, Benjamin D. Parker, Thomas Roewer, Proshanta Saha, Todd Takken, José A. Tierno:
A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation. FPGA 2012: 153-162 - [c4]Proshanta Saha, Chuck Haymes, Ralph Bellofatto, Bernard Brezzo, Mohit Kapur, Sameh W. Asaad:
Efficient in-system RTL verification and debugging using FPGAs (abstract only). FPGA 2012: 269
2000 – 2009
- 2009
- [j2]Enver Cavus, Charles L. Haymes, Babak Daneshrad:
Low BER performance estimation of LDPC codes via application of importance sampling to trapping sets. IEEE Trans. Commun. 57(7): 1886-1888 (2009) - 2007
- [c3]Yasunao Katayama, Chuck Haymes, Daiju Nakano, Troy J. Beukema, Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Brian P. Gaucher, Kai Schleupen:
2-Gbps Uncompressed HDTV Transmission over 60-GHz SiGe Radio Link. CCNC 2007: 12-16 - 2006
- [j1]Scott K. Reynolds, Brian A. Floyd, Ullrich R. Pfeiffer, Troy J. Beukema, Janusz Grzyb, Chuck Haymes, Brian P. Gaucher, Mehmet Soyuer:
A Silicon 60-GHz Receiver and Transmitter Chipset for Broadband Communications. IEEE J. Solid State Circuits 41(12): 2820-2831 (2006) - [c2]Enver Cavus, Charles L. Haymes, Babak Daneshrad:
An IS Simulation Technique for Very Low BER Performance Evaluation of LDPC Codes. ICC 2006: 1095-1100 - [c1]Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Troy J. Beukema, Janus Grzyb, Chuck Haymes:
A silicon 60GHz receiver and transmitter chipset for broadband communications. ISSCC 2006: 649-658
Coauthor Index
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