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ORCIDGrzegorz Borowik
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2020 – today
- 2023
[j5]Maciej Grzenda
, Stanislaw Kazmierczak, Marcin Luckner, Grzegorz Borowik, Jacek Mandziuk:
Evaluation of machine learning methods for impostor detection in web applications. Expert Syst. Appl. 231: 120736 (2023)- [j4]Maksymilian Bujok, Alicja Smoktunowicz, Grzegorz Borowik:
On computing the symplectic LLT factorization. Numer. Algorithms 93(3): 1401-1416 (2023) - [i3]Grzegorz Borowik, Michal Balicki, Michal Kasprzak, Piotr Cukier:
Improved Mesh Processing using Distorted Pole Spherical Coordinates. CoRR abs/2306.04625 (2023) - 2022
- [c16]Konrad Kluwak, Ryszard Klempous, Atsushi Ito, Tomasz Górski, Jan Nikodem, Konrad Wojciechowski, Jerzy W. Rozenblit, Grzegorz Borowik, Zenon Chaczko, Wojciech Bozejko, Marek Kulbacki:
Reference Datasets for Analysis of Traditional Japanese and German Martial Arts. EUROCAST 2022: 504-511 - [i2]Maksymilian Bujok, Alicja Smoktunowicz, Grzegorz Borowik:
On computing the symplectic LLT factorization. CoRR abs/2204.03927 (2022) - 2021
- [c15]Zenon Chaczko, Christopher Chiu, Grzegorz Borowik, Robin Braun:
Assistive IoT-centric Robotics for Senior Living. ITHET 2021: 1-6 - 2020
- [c14]Grzegorz Borowik, Tadeusz Luba, Ryszard Klempous:
Comparison of algorithms for dimensionality reduction and their application to index generation functions. SoSE 2020: 283-288
2010 – 2019
- 2018
- [j3]Grzegorz Borowik:
Optimization on the Complementation Procedure Towards Efficient Implementation of the Index Generation Function. Int. J. Appl. Math. Comput. Sci. 28(4): 803-815 (2018) - 2016
- [i1]Marcin Wozniak, Dawid Polap, Grzegorz Borowik, Christian Napoli:
A First Attempt to Cloud-Based User Verification in Distributed System. CoRR abs/1601.07446 (2016) - 2015
- [j2]Tomasz Wandowski, Pawel Malinowski, Wieslaw Ostachowicz, Mariusz Rawski, Pawel Tomaszewicz, Tadeusz Luba, Grzegorz Borowik:
Embedded Damage Localization Subsystem Based on Elastic Wave Propagation. Comput. Aided Civ. Infrastructure Eng. 30(8): 654-665 (2015) - [p1]Grzegorz Borowik, Dariusz Nogalski:
Technique for Transformation of DL Knowledge Base to Boolean Representation. Computational Intelligence and Efficiency in Engineering Systems 2015: 33-46 - [e1]Grzegorz Borowik, Zenon Chaczko, Witold Jacak, Tadeusz Luba:
Computational Intelligence and Efficiency in Engineering Systems. Studies in Computational Intelligence 595, Springer 2015, ISBN 978-3-319-15719-1 [contents] - 2014
- [c13]Grzegorz Borowik, Andrzej Krasniewski, Tadeusz Luba:
Rule Induction Based on Logic Synthesis Methods. ICSEng 2014: 813-816 - [c12]Zenon Chaczko, Grzegorz Borowik, Philip Hsieh:
Simulating Active Interference Cancellation in Cognitive Radio. ICSEng 2014: 859-864 - 2013
- [c11]Grzegorz Borowik:
Boolean Function Complementation Based Algorithm for Data Discretization. EUROCAST (2) 2013: 218-225 - [c10]Ahmed Khamis, Dawid Zydek, Grzegorz Borowik, D. Subbaram Naidu:
Control System Design Based on Modern Embedded Systems. EUROCAST (2) 2013: 491-498 - 2011
- [j1]Dawid Zydek, Henry Selvaraj, Grzegorz Borowik, Tadeusz Luba:
Energy characteristic of a processor allocator and a network-on-chip. Int. J. Appl. Math. Comput. Sci. 21(2): 385-399 (2011) - [c9]Grzegorz Borowik, Andrzej Krasniewski:
Trading-Off Error Detection Efficiency with Implementation Cost for Sequential Circuits Implemented with FPGAs. EUROCAST (2) 2011: 327-334 - [c8]Grzegorz Borowik, Andrzej Paszkiewicz:
Method of Generating Irreducible Polynomials over GF(3) on the Basis of Trinomials. EUROCAST (2) 2011: 335-342 - [c7]Grzegorz Borowik, Tadeusz Luba, Pawel Tomaszewicz:
On Memory Capacity to Implement Logic Functions. EUROCAST (2) 2011: 343-350 - [c6]Grzegorz Borowik, Tadeusz Luba, Dawid Zydek:
Reduction of Knowledge Representation Using Logic Minimization Techniques. ICSEng 2011: 482-485 - [c5]Grzegorz Borowik, Andrzej Paszkiewicz:
Hardware Accelerator for Generating Primitive Polynomials over GF(3). ICSEng 2011: 486-487 - [c4]Grzegorz Borowik, Andrzej Krasniewski:
A Tool for Trading-Off On-Line Error Detection Efficiency with Implementation Cost for Sequential Logic Implemented in FPGAs. ICSEng 2011: 488-489
2000 – 2009
- 2009
- [c3]Grzegorz Borowik, Tadeusz Luba, Bogdan J. Falkowski:
Logic synthesis method for pattern matching circuits implementation in FPGA with embedded memories. DDECS 2009: 230-233 - [c2]Grzegorz Borowik, Tadeusz Luba:
Decomposing Pattern Matching Circuit. EUROCAST 2009: 563-570 - 2007
- [c1]Grzegorz Borowik, Bogdan J. Falkowski, Tadeusz Luba:
Cost-Efficient Synthesis for Sequential Circuits Implemented Using Embedded Memory Blocks of FPGAs. DDECS 2007: 99-104
Coauthor Index
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