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2020 – today
- 2024
[c7]Tanutsorn Wongphatcharatham, Watid Phakphisut, Tanun Jaruvitayakovit, Amnart Boonkajay, Jiajia Huang:
Deep Learning Aided Robust RSRP Prediction in Cellular Networks. VTC Fall 2024: 1-5- 2023
- [j5]Chatuporn Duangthong
, Watid Phakphisut, Paramote Wardkein:
Efficient Design of Read Voltages and LDPC Codes in NAND Flash Memory Using Density Evolution. IEEE Access 11: 74420-74437 (2023) - 2022
- [j4]Sirawit Khittiwitchayakul, Watid Phakphisut:
Sliding-Window Turbo Equalization and Its Reduced-Complexity Decoding Techniques. IEEE Access 10: 46558-46570 (2022) - [j3]Sirawit Khittiwitchayakul, Watid Phakphisut, Pornchai Supnithi:
Integer programming-based non-uniform window decoding schedules for spatially coupled low-density parity-check codes. IET Commun. 16(17): 2019-2035 (2022)
2010 – 2019
- 2019
- [c6]Sirawit Khittiwitchayakul, Watid Phakphisut, Pornchai Supnithi:
Sliding-Window Processing of Turbo Equalization for Partial Response Channels. ICT 2019: 182-186 - [c5]Chatuporn Duangthong, Watid Phakphisut, Pornchai Supnithi:
Read Voltage Optimization in MLC NAND Flash Memory via the Density Evolution. ICT 2019: 361-365 - 2014
- [c4]Watid Phakphisut, Pornchai Supnithi:
Decoding algorithm of LDPC codes for cascaded BSC-AWGN channels. APSIPA 2014: 1-4 - 2013
- [j2]Watid Phakphisut, Patanasak Prompakdee, Pornchai Supnithi:
Design of Quasi-Cyclic LDPC Codes with Maximized Girth Property. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(11): 2128-2133 (2013) - 2012
- [c3]Watid Phakphisut, Pornchai Supnithi:
Mixed-scheduling belief propagation for LDPC decoders in the magnetic recording systems. ISITA 2012: 125-129 - 2011
- [j1]Pornchai Supnithi, Watid Phakphisut, Wicharn Singhaudom:
Structured LDPC Codes to Reduce Pseudo Cycles for Turbo Equalization in Perpendicular Magnetic Recording. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(6): 1441-1448 (2011) - [c2]Patanasak Prompakdee, Watid Phakphisut, Pornchai Supnithi:
Quasi Cyclic-LDPC codes based on PEG algorithm with maximized girth property. ISPACS 2011: 1-4 - [c1]Warangrat Wiriya, Watid Phakphisut, Pornchai Supnithi:
LDPC decoder with modified LLR for bit patterned media with write errors. ISPACS 2011: 1-4
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