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Mats Torkelson
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2000 – 2009
- 2000
- [j6]Anders Berkeman, Viktor Öwall, Mats Torkelson:
A low logic depth complex multiplier using distributed arithmetic. IEEE J. Solid State Circuits 35(4): 656-659 (2000) - [c10]Thomas Olsson, Peter Nilsson, Thomas Meincke, Ahmad Hemami, Mats Torkelson:
A digitally controlled low-power clock multiplier for globally asynchronous locally synchronous designs. ISCAS 2000: 13-16
1990 – 1999
- 1999
- [j5]Shousheng He, Mats Torkelson:
An Orthogonal Time-Frequency Extraction Approach to 2D Systolic Architecture for 1D DFT Computation. J. VLSI Signal Process. 21(1): 61-70 (1999) - [j4]Viktor Öwall, Mats Torkelson, Peter Egelberg:
A Custom Image Convolution DSP with a Sustained Calculation Capacity of >1 GMAC/s and Low I/O Bandwidth. J. VLSI Signal Process. 23(2-3): 335-350 (1999) - 1998
- [c9]Shousheng He, Mats Torkelson:
Design and implementation of a 1024-point pipeline FFT processor. CICC 1998: 131-134 - [c8]Anders Berkeman, Viktor Öwall, Mats Torkelson:
A complex multiplier with low logic depth. ICECS 1998: 47-50 - 1997
- [j3]Peter Nilsson, Mats Torkelson:
A custom digital intermediate frequency filter for the American mobile telephone system. IEEE J. Solid State Circuits 32(6): 806-815 (1997) - 1996
- [j2]Peter Nilsson, Mats Torkelson:
A monolithic digital clock-generator for on-chip clocking of custom DSP's. IEEE J. Solid State Circuits 31(5): 700-706 (1996) - [j1]Shousheng He, Mats Torkelson:
Computing partial DFT for comb spectrum evaluation. IEEE Signal Process. Lett. 3(6): 173-175 (1996) - [c7]Pontus Åström, Peter Nilsson, Mats Torkelson:
Design of a fast and area efficient filter. EUSIPCO 1996: 1-4 - [c6]Shousheng He, Mats Torkelson:
A New Approach to Pipeline FFT Processor. IPPS 1996: 766-770 - 1995
- [c5]Shousheng He, Mats Torkelson:
A Pipelined Bit-Serial Complex Multiplier Using Distributed Arithmetic. ISCAS 1995: 2313-2316 - [c4]Shousheng He, Mats Torkelson:
VLSI computation of the partial DFT for (de)modulation in multi-channel OFDM system. PIMRC 1995: 1257 - 1994
- [c3]Peter Nilsson, Mats Torkelson, Kent Palmkvist, Mark Vesterbacka, Lars Wanhammar:
A Bit-Serial CMOS Digital IF-Filter for Mobile Radio Using an On-Chip Clock. Mobile Communications 1994: 510-521 - [c2]Shousheng He, Mats Torkelson:
A systolic array implementation of common factor algorithm to compute DFT. ISPAN 1994: 374-381 - 1993
- [c1]Viktor Öwall, Pietro Andreani, L. Brange, Peter Nilsson, A. Wass, Mats Torkelson:
A GSM speech coder implemented on a customized processor architecture. ISCAS 1993: 235-238
Coauthor Index
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