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Jung-Lin Yang
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2010 – 2019
- 2012
- [j3]Jung-Lin Yang, Shin-Nung Lu, Pei-Hsuan Yu:
Asynchronous Circuit Design on Field Programmable Gate Array Devices. IEICE Trans. Electron. 95-C(4): 516-522 (2012) - 2010
- [j2]Jung-Lin Yang, Jau-Cheng Wei, Shin-Nung Lu:
HDLs Modeling Technique for Burst-Mode and Extended Burst-Mode Asynchronous Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2590-2599 (2010)
2000 – 2009
- 2009
- [j1]Jung-Lin Yang, Chih-Wei Chao:
Ultra Low Power Delay Element with Post-Chip Adjustable Ability. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3381-3389 (2009) - 2006
- [c3]Jung-Lin Yang, Hsu-Ching Tien, Chia-Ming Hsu, Sung-Min Lin:
High-Level Synthesis for Self-Timed Systems. APCCAS 2006: 1410-1413 - 2003
- [c2]Jung-Lin Yang, Erik Brunvand:
Using dynamic domino circuits in self-timed systems. ACM Great Lakes Symposium on VLSI 2003: 253-256 - [c1]Jung-Lin Yang, Erik Brunvand:
Self-Timed Design with Dynamic Domino Circuits. ISVLSI 2003: 217-219
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