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ORCIDGianluca Boselli
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2020 – today
- 2023
[c9]M. Monishmurali, Nagothu Karmel Kranthi, Gianluca Boselli, Mayank Shrivastava:
Impact of Thin-oxide Gate on the On-Resistance of HV-PNP Under ESD Stress. IRPS 2023: 1-5- [c8]Laura Zunarelli, Luigi Balestra
, Susanna Reggiani, Raj Sankaralingam, Mariano Dissegna, Gianluca Boselli:
TCAD study of the Holding-Voltage Modulation in Irradiated SCR-LDMOS for HV ESD Protection. IRPS 2023: 1-6 - 2022
- [c7]M. Monishmurali, Nagothu Karmel Kranthi, Gianluca Boselli, Mayank Shrivastava:
Effect of Source & Drain Side Abutting on the Low Current Filamentation in LDMOS-SCR Devices. IRPS 2022: 6 - [c6]Laura Zunarelli, Susanna Reggiani, Elena Gnani, Raj Sankaralingam, Mariano Dissegna, Gianluca Boselli:
TCAD Investigation of Power-to-Failure Evaluation for Ultrafast Events in BJT-based ESD Protection Cells. IRPS 2022: 6 - 2020
- [c5]Nagothu Karmel Kranthi, Chirag Garg, Boeila Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava:
How to Achieve Moving Current Filament in High Voltage LDMOS Devices: Physical Insights & Design Guidelines for Self-Protected Concepts. IRPS 2020: 1-6 - [c4]Nagothu Karmel Kranthi, Boeila Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava:
Design Insights to Address Low Current ESD Failure and Power Scalability Issues in High Voltage LDMOS-SCR Devices. IRPS 2020: 1-5
2010 – 2019
- 2019
- [c3]Nagothu Karmel Kranthi, Boeila Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava:
Physical Insights into the Low Current ESD Failure of LDMOS-SCR and its Implication on Power Scalability. IRPS 2019: 1-5 - [c2]Nagothu Karmel Kranthi, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava:
Current Filament Dynamics Under ESD Stress in High Voltage (Bidirectional) SCRs and It's Implications on Power Law Behavior. IRPS 2019: 1-5 - 2016
- [j6]Akram A. Salman, Farzan Farbiz, Ann Concannon, Hal Edwards, Gianluca Boselli:
Improved inductive-system-level IEC ESD performance for automotive applications using mutual ballasted ESD protection technique. Microelectron. Reliab. 57: 47-52 (2016) - 2012
- [j5]Gianluca Boselli:
ESD design challenges in state-of-the-art analog technologies. Microelectron. Reliab. 52(9-10): 1769-1775 (2012) - [c1]Michael G. Khazhinsky, Shuqing Cao, Harald Gossner, Gianluca Boselli, Melanie Etherton:
Electronic design automation (EDA) solutions for ESD-robust design and verification. CICC 2012: 1-8
2000 – 2009
- 2006
- [j4]Charvaka Duvvury, Robert Steinhoff, Gianluca Boselli, Vijay Reddy, Hans Kunz, Steve Marum, Roger Cline:
Gate oxide failures due to anomalous stress from HBM ESD testers. Microelectron. Reliab. 46(5-6): 656-665 (2006) - 2005
- [j3]Jeremy C. Smith, Gianluca Boselli:
A MOSFET power supply clamp with feedback enhanced triggering for ESD protection in advanced CMOS technologies. Microelectron. Reliab. 45(2): 201-210 (2005) - [j2]Gianluca Boselli, Charvaka Duvvury:
Trends and challenges to ESD and Latch-up designs for nanometer CMOS technologies. Microelectron. Reliab. 45(9-11): 1406-1414 (2005) - 2001
- [j1]Gianluca Boselli, Stan Meeuwsen, Ton J. Mouthaan, Fred G. Kuper:
Investigations on double-diffused MOS transistors under ESD zap conditions. Microelectron. Reliab. 41(3): 395-405 (2001)
Coauthor Index
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