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Serdar Süer Erdem
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2010 – 2019
- 2019
- [c4]Erdem Ozcan, Serdar Süer Erdem:
A High Performance Full-Word Barrett Multiplier Designed for FPGAs with DSP Resources. PRIME 2019: 73-76 - 2018
- [j4]Erdem Ozcan, Serdar Süer Erdem:
A fast digit based Montgomery multiplier designed for FPGAs with DSP resources. Microprocess. Microsystems 62: 12-19 (2018) - 2017
- [j3]Serdar Süer Erdem, Tugrul Yanik, Anil Çelebi:
A General Digit-Serial Architecture for Montgomery Modular Multiplication. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1658-1668 (2017) - 2015
- [j2]Bilal Uslu, Serdar Süer Erdem:
Versatile digit serial multipliers for binary extension fields. Comput. Electr. Eng. 46: 29-45 (2015) - 2014
- [j1]Kazim Yumbul, Serdar Süer Erdem, Erkay Savas:
On Selection of Modulus of Quadratic Codes for the Protection of Cryptographic Operations against Fault Attacks. IEEE Trans. Computers 63(5): 1182-1196 (2014) - 2011
- [c3]Kazim Yumbul, Serdar Süer Erdem, Erkay Savas:
On Protecting Cryptographic Applications Against Fault Attacks Using Residue Codes. FDTC 2011: 69-79 - 2010
- [c2]Kazim Yumbul, Serdar Süer Erdem, Erkay Savas:
Design and implementation of robust embedded processor for cryptographic applications. SIN 2010: 178-185
2000 – 2009
- 2009
- [p1]Serdar Süer Erdem, Tugrul Yanik, Çetin Kaya Koç:
Fast Finite Field Multiplication. Cryptographic Engineering 2009: 75-104 - 2003
- [c1]Serdar Süer Erdem, Çetin Kaya Koç:
A Less Recursive Variant of Karatsuba-Ofman Algorithm for Multiplying Operands of Size a Power of Two. IEEE Symposium on Computer Arithmetic 2003: 28-
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