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N. Moorthy Muthukrishnan

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2010 – 2019

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2018
[c13]
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Madhuri Bayya, U. M. Rao, BVVSN Prabhakar Rao, N. Moorthy Muthukrishnan:
Comparison of Voltage Charging Techniques to Increase the Life of Lead Acid Batteries. iSES 2018: 279-284
2012
[c12]
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Syed Ershad Ahmed, Sibi Abraham, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
A Modified Twin Precision Multiplier with 2D Bypassing Technique. ISED 2012: 102-106
[c11]
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Chetan Vudadha, P. Sai Phaneendra, Sreehari Veeramachaneni, Syed Ershad Ahmed, N. Moorthy Muthukrishnan, Mandalika B. Srinivas:
Design of Prefix-Based Optimal Reversible Comparator. ISVLSI 2012: 201-206
[c10]
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Chetan Vudadha, P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, Mandalika B. Srinivas:
Design and Analysis of Reversible Ripple, Prefix and Prefix-Ripple Hybrid Adders. ISVLSI 2012: 225-230
[c9]
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Chetan Vudadha, Goutham Makkena, M. Venkata Swamy Nayudu, P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
Low-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive Resolution Flash ADCs. VLSI Design 2012: 280-285
2011
[c8]
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Chetan Kumar V., P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
A Unified Architecture for BCD and Binary Adder/Subtractor. DSD 2011: 426-429
[c7]
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P. Sai Phaneendra, Chetan Vudadha, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
Increment/decrement/2's complement/priority encoder circuit for varying operand lengths. ISCIT 2011: 472-477
[c6]
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Mahesh Kumar Adimulam, Krishna Kumar Movva, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
A Multiple-Bandwidth 10-bit SAR Analog to Digital Converter. ISED 2011: 24-29
[c5]
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Chetan Kumar V., P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
A Reconfigurable INC/DEC/2's Complement/Priority Encoder Circuit with Improved Decision Block. ISED 2011: 100-105
[c4]
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Chetan Kumar V., Sai Phaneendra P., Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
A Prefix Based Reconfigurable Adder. ISVLSI 2011: 349-350
2010
[c3]
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Mahesh Kumar Adimulam, Krishna Kumar Movva, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, Mandalika B. Srinivas:
Low power, variable resolution pipelined analog to Digital converter with sub flash architecture. APCCAS 2010: 204-207
[c2]
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Mahesh Kumar Adimulam, Krishna Kumar Movva, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
A low power, variable resolution two-step flash ADC. ACM Great Lakes Symposium on VLSI 2010: 39-44
[c1]
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Mahesh Kumar Adimulam, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
A Novel, Variable Resolution Flash ADC with Sub Flash Architecture. ISVLSI 2010: 434-435

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