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ORCIDJürgen Foag
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2010 – 2019
- 2010
[p1]Carsten Albrecht, Jürgen Foag, Roman Koch, Erik Maehle, Thilo Pionteck
:
DynaCORE - Dynamically Reconfigurable Coprocessor for Network Processors. Dynamically Reconfigurable Systems 2010: 335-354
2000 – 2009
- 2006
- [j1]Jürgen Foag, Thomas Wild:
Queuing algorithm for speculative Network Processors. Int. J. High Perform. Comput. Netw. 4(5/6): 241-247 (2006) - [c8]Carsten Albrecht, Jürgen Foag, Roman Koch, Erik Maehle:
DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors. PDP 2006: 101-108 - 2005
- [c7]Jürgen Foag, Thomas Wild:
Predictive processing architecture extension for network processors. ICECS 2005: 1-4 - 2004
- [b1]Jürgen Foag:
Speculative protocol processing for high-speed packet forwarding. Technical University Munich, Germany, 2004, pp. 1-147 - [c6]Jürgen Foag, Thomas Wild:
Queuing Algorithm for Speculative Network Processors. HPCS 2004: 3-8 - [c5]Jürgen Foag:
Speculative Network Processor for Quality-of-Service-Aware Protocol Processing. NCA 2004: 207-214 - 2003
- [c4]Winthir Brunnbauer, Thomas Wild, Jürgen Foag, Nuria Pazos:
A Constructive Algorithm with Look-Ahead for Mapping and Scheduling of Task Graphs with Conditional Edges. DSD 2003: 98-103 - [c3]Thomas Wild, Jürgen Foag, Nuria Pazos, Winthir Brunnbauer:
Mapping and Scheduling for Architecture Exploration of Networking SoCs. VLSI Design 2003: 376-381 - 2002
- [c2]Jürgen Foag, Nuria Pazos, Thomas Wild, Winthir Brunnbauer:
Self-Adaptive Parallel Processing Architecture For High-speed Networking. HPCS 2002: 45-52 - [c1]Jürgen Foag, Thomas Wild, Nuria Pazos, Winthir Brunnbauer:
Predictive methodology for high-performance networking. ISCC 2002: 169-174
Coauthor Index
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