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V. Thomas Rhyne

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1982
[j8]
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Noel R. Strader, V. Thomas Rhyne:
A Canonical Bit-Sequential Multiplier. IEEE Trans. Computers 31(8): 791-795 (1982)
1977
[j7]
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V. Thomas Rhyne, Philip S. Noe:
On the Number of Distinct State Assignments for a Sequential Machine. IEEE Trans. Computers 26(1): 73-75 (1977)
[j6]
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V. Thomas Rhyne, Philip S. Noe, Melvin H. McKinney, Udo W. Pooch:
A New Technique for the Fast Minimization of Switching Functions. IEEE Trans. Computers 26(8): 757-764 (1977)
1976
[j5]
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Philip S. Noe, V. Thomas Rhyne:
Optimum State Assignment for the D Flip-Flop. IEEE Trans. Computers 25(3): 306-311 (1976)
1974
[j4]
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Philip S. Noe, V. Thomas Rhyne:
A Modification to the SHR-Optimal State Assignment Procedure. IEEE Trans. Computers 23(3): 327-329 (1974)
[j3]
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Philip S. Noe, V. Thomas Rhyne, S. Suraratrungsi:
Comments on "Weighting Method for the Determination of the Irredundant Set of Prime Implicants". IEEE Trans. Computers 23(6): 646 (1974)
1971
[j2]
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V. Thomas Rhyne:
A Simple Postcorrection for Nonrestoring Division. IEEE Trans. Computers 20(2): 213-214 (1971)
1970
[j1]
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V. Thomas Rhyne:
Serial Binary-to-Decimal and Decimal-to-Binary Conversion. IEEE Trans. Computers 19(9): 808-812 (1970)

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