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ORCIDDileep Bhandarkar
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Books and Theses
- 1996
[b1]Dileep Bhandarkar:
Alpha implementations and architecture - complete reference and guide. Digital Press 1996, ISBN 978-1-55558-130-5, pp. I-XVIII, 1-328
Journal Articles
- 1997
- [j12]Dileep Bhandarkar:
RISC versus CISC: a tale of two chips. SIGARCH Comput. Archit. News 25(1): 1-12 (1997) - 1982
- [j11]Dileep Bhandarkar:
Architecture Management for Ensuring Software Compatibility in the VAX Family of Computers. Computer 15(2): 87-93 (1982) - 1981
- [j10]Mahadev Satyanarayanan
, Dileep Bhandarkar:
Design Trade-Offs in VAX-11 Translation Buffer Organization. Computer 14(12): 103-111 (1981) - 1980
- [j9]Mary Payne, Dileep Bhandarkar:
VAX floating point: a solid foundation for numerical computation. SIGARCH Comput. Archit. News 8(4): 22-33 (1980) - 1979
- [j8]Dileep Bhandarkar, J. Brock Barton, A. F. Tasch Jr.:
CCD Charge-Coupled Device Memories: A Perspective. Computer 12(1): 16-24 (1979) - [j7]Dileep Bhandarkar:
Special Feature the Impact Of Semiconductor Technology on Computer Systems. Computer 12(9): 92-98 (1979) - 1978
- [j6]Dileep P. Bhandarkar, J. Egil Juliussen:
Semiconductor technology: trends and implications. SIGARCH Comput. Archit. News 7(1): 4-14 (1978) - 1977
- [j5]Dileep Bhandarkar:
Some Performance Issues in Multiprocessor System Design. IEEE Trans. Computers 26(5): 506-511 (1977) - 1975
- [j4]Dileep Bhandarkar, Egil Juliussen:
Tutorial: Computer System Advantages of Magnetic Bubble Memories. Computer 8(11): 35-40 (1975) - [j3]Dileep P. Bhandarkar:
A practical application of memory interference models. SIGMETRICS Perform. Evaluation Rev. 4(2): 33-39 (1975) - [j2]Dileep Bhandarkar:
Analysis of Memory Interference in Multiprocessors. IEEE Trans. Computers 24(9): 897-908 (1975) - [j1]Dileep Bhandarkar:
On the Performance of Magnetic Bubble Memories in Computer Systems. IEEE Trans. Computers 24(11): 1125-1129 (1975)
Conference and Workshop Papers
- 2009
- [c13]Dileep Bhandarkar:
Performance analysis in the real world of on line services. ISPASS 2009 - 2003
- [c12]Dileep Bhandarkar:
Billion Transistor Chips in Mainstream Enterprise Platforms of the Future. HPCA 2003: 3 - 2002
- [c11]Dileep Bhandarkar:
Parallelism in Mainstream Enterprise Platforms of the Future. IEEE PACT 2002: 3-4 - 1997
- [c10]Dileep Bhandarkar, Jianxun Jason Ding:
Performance Characterization of the Pentium(r) Pro Processor. HPCA 1997: 288-299 - 1996
- [c9]Zarka Cvetanovic, Dileep Bhandarkar:
Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads. HPCA 1996: 270-280 - 1994
- [c8]Zarka Cvetanovic, Dileep Bhandarkar:
Characterization of Alpha AXP Performance Using TP and SPEC Workloads. ISCA 1994: 60-70 - 1991
- [c7]Dileep Bhandarkar, Douglas W. Clark:
Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization. ASPLOS 1991: 310-319 - 1990
- [c6]Dileep Bhandarkar, Richard Brunner:
Vector extensions to the VAX architecture. Compcon 1990: 120-126 - [c5]Dileep Bhandarkar, David A. Orbits, Richard T. Witek, Wayne M. Cardoza, David N. Cutler:
High performance issue oriented architecture. Compcon 1990: 153-160 - [c4]Dileep Bhandarkar, Richard Brunner:
VAX Vector Architecture. ISCA 1990: 204-215 - 1987
- [c3]Don McInnis, B. Kusik, Dileep Bhandarkar:
VAX 8800 System Overview. COMPCON 1987: 316-321 - 1975
- [c2]Dileep P. Bhandarkar, J. Egil Juliussen:
A comparative evaluation of the cost effectiveness of computer systems (Paper Session). ACM Annual Conference 1975: 323-324 - 1973
- [c1]Dileep Bhandarkar, Samuel H. Fuller:
Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems. ISCA 1973: 1-6
Editorship
- 1998
- [e1]Dileep Bhandarkar, Anant Agarwal:
ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998. ACM Press 1998, ISBN 1-58113-107-0 [contents]
Coauthor Index
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