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ORCIDSumit Roy 0003
Person information
- affiliation: Magma Design Automation
- affiliation: Cadence Design Systems
- affiliation: University of Illinois at Urbana-Champaign, IL, USA
Other persons with the same name
- Sumit Roy — disambiguation page
- Sumit Roy 0001
![[0000-0002-3357-4700]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-3357-4700")
— University of Washington, Department of Electrical Engineering, Seattle, WA, USA (and 1 more) - Sumit Roy 0002 — Rhythm NewMedia (and 2 more)
- Sumit Roy 0004 — Kalyani Government Engineering College, Kalyani, Nadia, India
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Books and Theses
- 1998
[b1]Sumit Roy:
Low-Power-Driven Synthesis Algorithms for Sequential and Combinational Circuits. University of Illinois Urbana-Champaign, USA, 1998
Conference and Workshop Papers
- 2003
- [c10]Qi Wang, Sumit Roy:
Power minimization by clock root gating. ASP-DAC 2003: 249-254 - [c9]Qi Wang, Sumit Roy:
RTL Power Optimization with Gate-Level Accuracy. ICCAD 2003: 39-45 - 1999
- [c8]Sumit Roy, Krishna P. Belkhale, Prithviraj Banerjee:
An Approxmimate Algorithm for Delay-Constraint Technology Mapping. DAC 1999: 367-372 - 1998
- [c7]Sumit Roy, Harm Arts, Prithviraj Banerjee:
PowerShake: A Low Power Driven Clustering and Factoring Methodology for Boolean Expressions. DATE 1998: 967-968 - [c6]Sumit Roy, Harm Arts, Prithviraj Banerjee:
PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis. ICCAD 1998: 601-606 - [c5]Sumit Roy, Harm Arts, Prithviraj Banerjee:
A low-power logic optimization methodology based on a fast power-driven mapping. ICCD 1998: 175-181 - [c4]Sumit Roy, Prithviraj Banerjee, Majid Sarrafzadeh:
Partitioning sequential circuits for low power. VLSI Design 1998: 212-217 - 1997
- [c3]John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee:
Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. International Conference on Supercomputing 1997: 172-179 - [c2]Sumit Roy, Prithviraj Banerjee:
A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis. IPPS 1997: 665-671 - 1995
- [c1]Kaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee:
Parallel algorithms for logic synthesis using the MIS approach. IPPS 1995: 579-585
Coauthor Index
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