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ORCIDHernán Ponce de León
Person information
- affiliation: Huawei Dresden Research Center, Germany
- affiliation (former): University of the Bundeswehr Munich, Germany
- affiliation (former): fortiss GmbH
- affiliation (former): ENS Cachan, Paris, France
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2020 – today
- 2023
[j8]Hernán Ponce de León, Stefan Winter:
Front Matter - ECOOP 2023 Artifacts, Table of Contents, Preface, Artifact Evaluation Committee. Dagstuhl Artifacts Ser. 9(2): 00:i-00:xii (2023)- [j7]Thomas Haas
, René Pascasl Maseli, Roland Meyer, Hernán Ponce de León:
Static Analysis of Memory Models for SMT Encodings. Proc. ACM Program. Lang. 7(OOPSLA2): 1618-1647 (2023) - 2022
- [j6]Thomas Haas, Roland Meyer, Hernán Ponce de León:
CAAT: consistency as a theory. Proc. ACM Program. Lang. 6(OOPSLA2): 114-144 (2022) - [c17]Hernán Ponce de León, Johannes Kinder:
Cats vs. Spectre: An Axiomatic Approach to Modeling Speculative Execution Attacks. SP 2022: 235-248 - [c16]Hernán Ponce de León, Thomas Haas, Roland Meyer:
Dartagnan: SMT-based Violation Witness Validation (Competition Contribution). TACAS (2) 2022: 418-423 - 2021
- [c15]Hernán Ponce de León, Thomas Haas, Roland Meyer:
Dartagnan: Leveraging Compiler Optimizations and the Price of Precision (Competition Contribution). TACAS (2) 2021: 428-432 - [i6]Hernán Ponce de León, Johannes Kinder:
Cats vs. Spectre: An Axiomatic Approach to Modeling Speculative Execution Attacks. CoRR abs/2108.13818 (2021) - [i5]Antonio Paolillo, Hernán Ponce de León, Thomas Haas, Diogo Behrens, Rafael Lourenco de Lima Chehab, Ming Fu, Roland Meyer:
Verifying and Optimizing Compact NUMA-Aware Locks on Weak Memory Models. CoRR abs/2111.15240 (2021) - 2020
- [c14]Pierre Bouvier, Hubert Garavel, Hernán Ponce de León:
Automatic Decomposition of Petri Nets into Automata Networks - A Synthetic Account. Petri Nets 2020: 3-23 - [c13]Hernán Ponce de León, Florian Furbach, Keijo Heljanko, Roland Meyer:
Dartagnan: Bounded Model Checking for Weak Memory Models (Competition Contribution). TACAS (2) 2020: 378-382
2010 – 2019
- 2019
- [c12]Natalia Gavrilenko, Hernán Ponce de León, Florian Furbach, Keijo Heljanko, Roland Meyer:
BMC for Weak Memory Models: Relation Analysis for Compact SMT Encodings. CAV (1) 2019: 355-365 - 2018
- [j5]Hernán Ponce de León, Andrey Mokhov:
Compact and efficiently verifiable models for concurrent systems. Formal Methods Syst. Des. 53(3): 407-431 (2018) - [j4]Hernán Ponce de León, Lucio Nardelli, Josep Carmona, Seppe K. L. M. vanden Broucke:
Incorporating negative information to process discovery of complex systems. Inf. Sci. 422: 480-496 (2018) - [c11]Hernán Ponce de León, Florian Furbach, Keijo Heljanko, Roland Meyer:
BMC with Memory Models as Modules. FMCAD 2018: 1-9 - 2017
- [j3]Olli Saarikivi, Hernán Ponce de León, Kari Kähkönen, Keijo Heljanko, Javier Esparza:
Minimizing Test Suites with Unfoldings of Multithreaded Programs. ACM Trans. Embed. Comput. Syst. 16(2): 45:1-45:24 (2017) - [c10]Hernán Ponce de León, Florian Furbach, Keijo Heljanko, Roland Meyer:
Portability Analysis for Weak Memory Models. PORTHOS: One Tool for all Models. SAS 2017: 299-320 - [i4]Hernán Ponce de León, Florian Furbach, Keijo Heljanko, Roland Meyer:
Portability Analysis for Axiomatic Memory Models. PORTHOS: One Tool for all Models. CoRR abs/1702.06704 (2017) - 2016
- [j2]Hernán Ponce de León, Stefan Haar, Delphine Longuet:
Model-based testing for concurrent systems: unfolding-based test selection. Int. J. Softw. Tools Technol. Transf. 18(3): 305-318 (2016) - 2015
- [c9]Hernán Ponce de León, Olli Saarikivi, Kari Kähkönen, Keijo Heljanko, Javier Esparza:
Unfolding Based Minimal Test Suites for Testing Multithreaded Programs. ACSD 2015: 40-49 - [c8]Hernán Ponce de León, César Rodríguez, Josep Carmona, Keijo Heljanko, Stefan Haar:
Unfolding-Based Process Discovery. ATVA 2015: 31-47 - [c7]Hernán Ponce de León, César Rodríguez, Josep Carmona:
POD - A Tool For Process Discovery Using Partial Orders and Independence Information. BPM (Demos) 2015: 100-104 - [c6]Hernán Ponce de León, Josep Carmona, Seppe K. L. M. vanden Broucke:
Incorporating Negative Information in Process Discovery. BPM 2015: 126-143 - [c5]Hernán Ponce de León, Andrey Mokhov:
Building Bridges Between Sets of Partial Orders. LATA 2015: 145-160 - [c4]Konstantinos Athanasiou, Hernán Ponce de León, Stefan Schwoon:
Test Case Generation for Concurrent Systems Using Event Structures. TAP@STAF 2015: 19-37 - [i3]Hernán Ponce de León, Gonzalo Bonigo, Laura Brandán Briones:
Distributed Analysis for Diagnosability in Concurrent Systems. CoRR abs/1502.07466 (2015) - [i2]Laura Brandán Briones, Agnes Madalinski, Hernán Ponce de León:
Distributed Diagnosability Analysis with Petri Nets. CoRR abs/1502.07744 (2015) - [i1]Hernán Ponce de León, César Rodríguez, Josep Carmona, Keijo Heljanko, Stefan Haar:
Unfolding-Based Process Discovery. CoRR abs/1507.02744 (2015) - 2014
- [b1]Hernán Ponce de León:
Testing concurrent systems through event structures. (Test de systèmes concurrents à l'aide de structures d'événements). École normale supérieure de Cachan, France, 2014 - [j1]Hernán Ponce de León, Stefan Haar, Delphine Longuet:
Model-based testing for concurrent systems with labelled event structures. Softw. Test. Verification Reliab. 24(7): 558-590 (2014) - [c3]Hernán Ponce de León, Stefan Haar, Delphine Longuet:
Distributed Testing of Concurrent Systems: Vector Clocks to the Rescue. ICTAC 2014: 369-387 - 2013
- [c2]Hernán Ponce de León, Stefan Haar, Delphine Longuet:
Unfolding-Based Test Selection for Concurrent Conformance. ICTSS 2013: 98-113 - 2012
- [c1]Hernán Ponce de León, Stefan Haar, Delphine Longuet:
Conformance Relations for Labeled Event Structures. TAP@TOOLS 2012: 83-98
Coauthor Index
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