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Chih-Hsing Lin
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2010 – 2019
- 2018
- [c16]Chen-Chia Chen, Chih-Ting Kuo, Ssu-Ying Chen, Chih-Hsing Lin, Jin-Ju Chue, Yi-Jie Hsieh, Chun-Wen Cheng, Chieh-Ming Wu, Chun-Ming Huang:
Calibration of Low-Cost Particle Sensors by Using Machine-Learning Method. APCCAS 2018: 111-114 - [c15]Chih-Hsing Lin, Sheng-Wei Wang, Chen-Chia Chen, Chieh-Ming Wu, Chun-Ming Huang:
Temperature Variation Tolerance High Resolution Real-time Liquid Level Monitoring System. ICCE-Berlin 2018: 1-6 - 2015
- [c14]Chih-Hsing Lin, Ssu-Ying Chen, Chih-Ting Kuo, Gang-Neng Sung, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A real-time bridge structural health monitoring device using cost-effective one-axis accelerometers. ISSNIP 2015: 1-2 - 2014
- [c13]Chih-Hsing Lin, Ssu-Ying Chen, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang, Chih-Ting Kuo, Yu-Da Huang:
Structural health monitoring of bridges using cost-effective 1-axis accelerometers. SAS 2014: 24-27 - 2013
- [j3]Ching-Te Chiu, Wen-Chih Huang, Chih-Hsing Lin, Wei-Chih Lai, Ying-Fang Tsao:
Embedded Transition Inversion Coding With Low Switching Activity for Serial Links. IEEE Trans. Very Large Scale Integr. Syst. 21(10): 1797-1810 (2013) - [c12]Chun-Chieh Chiu, Chih-Hsing Lin, Chih-Chyau Yang, Yi-Jun Liu, Ssu-Ying Chen, Jin-Ju Chue, Chih-Ting Kuo, Gang-Neng Sung, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang:
Morpack Cube: A portable 3D heterogeneous system integration platform. SoCC 2013: 197-202 - 2012
- [c11]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chih-Hsing Lin, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Nien-Hsiang Chang, Wen-Ching Chen:
A modularized 3D heterogeneous system integration platform. APCCAS 2012: 396-399 - [c10]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chih-Hsing Lin, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Chun-Ping Lin, Wei-De Chien:
Boundary scan test solution for MorPACK platform. ISPACS 2012: 802-805 - [c9]Yi-Jun Liu, Chih-Chyau Yang, Chih-Hsing Lin, Chun-Chieh Chiu, Chun-Chieh Chu, Chien-Ming Wu, Chun-Ming Huang:
Microphone array application prototyping with MorPACK heterogeneous integrated system. SII 2012: 734-739 - [c8]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Nien-Hsiang Chang, Wen-Ching Chen, Chih-Hsing Lin, Hua-Hsin Luo:
A novel design flow for a 3D heterogeneous system prototyping platform. SoCC 2012: 78-82 - 2011
- [c7]Fanta Chen, Min-Sheng Kao, Yu-Hao Hsu, Chih-Hsing Lin, Jen-Ming Wu, Ching-Te Chiu, Shuo-Hung Hsu:
A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit. ISCAS 2011: 185-188 - [c6]Wen-Chih Huang, Chih-Hsing Lin, Ching-Te Chiu:
Embedded transition inversion coding for low power serial link. SiPS 2011: 102-105 - 2010
- [j2]Chih-Hsing Lin, Jia Shiuan Tsai, Ching-Te Chiu:
Switching Bilateral Filter With a Texture/Noise Detector for Universal Noise Removal. IEEE Trans. Image Process. 19(9): 2307-2320 (2010) - [c5]Chih-Hsing Lin, Jia Shiuan Tsai, Ching-Te Chiu:
Switching bilateral filter with a texture/noise detector for universal noise removal. ICASSP 2010: 1434-1437 - [c4]Chih-Hsing Lin, Yung-Chang Chang, Wen-Chih Huang, Wei-Chih Lai, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Chun-Ming Huang, Chih-Chyau Yang, Shih-Lun Chen:
A packet-based emulating platform with serializer/deserializer interface for heterogeneous IP verification. ISCAS 2010: 1061-1064
2000 – 2009
- 2009
- [j1]Min-Sheng Kao, Jen-Ming Wu, Chih-Hsing Lin, Fanta Chen, Ching-Te Chiu, Shawn S. H. Hsu:
A 10-Gb/s CML I/O Circuit for Backplane Interconnection in 0.18-µm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 17(5): 688-696 (2009) - 2008
- [c3]Chih-Hsing Lin, Ching-Te Chiu:
A 2.64GHz wide range low power DLL-based frequency multiplier with CML circuits using adaptive body bias. ICECS 2008: 790-793 - [c2]Yu-Hao Hsu, Ming-Hao Lu, Ping-Ling Yang, Fanta Chen, You-Hung Li, Min-Sheng Kao, Chih-Hsing Lin, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu:
A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology. ISCAS 2008: 3086-3089 - 2007
- [c1]Chih-Hsing Lin, Ching-Te Chiu:
A 2.24GHz Wide Range Low Jitter DLL-Based Frequency Multiplier using PMOS Active Load for Communication Applications. ISCAS 2007: 3888-3891
Coauthor Index
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