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Björn Osterloh
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Conference and Workshop Papers
- 2011
- [c7]Holger Michel, Frank Bubenhagen, Björn Fiethe, Harald Michalik, Björn Osterloh, Wayne Sullivan, Alex Wishart, Jørgen Ilstad, Sandi Habinc:
AMBA to SoCWire network on Chip bridge as a backbone for a Dynamic Reconfigurable Processing unit. AHS 2011: 227-233 - 2010
- [c6]Björn Osterloh, Harald Michalik, Björn Fiethe, Frank Bubenhagen:
Architecture verification of the SoCWire NoC approach for safe dynamic partial reconfiguration in space applications. AHS 2010: 1-8 - 2009
- [c5]Björn Osterloh, Harald Michalik, Sandi Habinc, Björn Fiethe:
Dynamic Partial Reconfiguration in Space Applications. AHS 2009: 336-343 - [c4]Björn Osterloh, Harald Michalik, Björn Fiethe:
SoCWire: A Robust and Fault Tolerant Network-on-Chip Approach for a Dynamic Reconfigurable System-on-Chip in FPGAs. ARCS 2009: 50-59 - 2008
- [c3]Björn Osterloh, Harald Michalik, Björn Fiethe, Karel Kotarowski:
SoCWire: A Network-on-Chip Approach for Reconfigurable System-on-Chip Designs in Space Applications. AHS 2008: 51-56 - 2007
- [c2]Björn Osterloh, Harald Michalik, Björn Fiethe, Frank Bubenhagen:
Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application. AHS 2007: 258-262 - [c1]Björn Fiethe, Harald Michalik, C. Dierker, Björn Osterloh, Gang Zhou:
Reconfigurable system-on-chip data processing units for space imaging instruments. DATE 2007: 977-982
Coauthor Index
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