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ORCIDJing Xie 0006
Person information
- affiliation: Pennsylvania State University, University Park, PA, USA
Other persons with the same name
- Jing Xie — disambiguation page
- Jing Xie 0001 — Norwegian University of Science and Technology, Department of Telematic, Trondheim, Norway (and 1 more)
- Jing Xie 0002 — Google, Mountain View, CA, USA
- Jing Xie 0003
![[0000-0003-1236-3944]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-1236-3944")
— Ocean University of China, Qingdao, China - Jing Xie 0004 — Pacific Northwest National Laboratory, Seattle Research Center, Seattle, WA, USA (and 1 more)
- Jing Xie 0005 — Tsinghua University, Beijing, China
- Jing Xie 0007 — RMIT University, Melbourne, VIC, Australia
- Jing Xie 0008 — University of Missouri at Columbia, Columbia, MO, USA
- Jing Xie 0009 — American Express Company, New York, NY, USA (and 1 more)
- Jing Xie 0010 — Shanghai Jiao Tong University, Shanghai, China
- Jing Xie 0011 — University of North Carolina at Charlotte, Charlotte, NC, USA
- Jing Xie 0012 — Harbin Institute of Technology, Harbin, Heilongjiang, China
- Jing Xie 0013 — Xi'an University of Finance and Economics, China
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2010 – 2019
- 2014
[j1]Jing Xie, Yang Du, Yuan Xie:
Testable cross-power domain interface (CPDI) circuit design in monolithic 3D technology. ACM J. Emerg. Technol. Comput. Syst. 11(1): 5:1-5:17 (2014)- 2013
- [c8]Qiaosha Zou, Jing Xie, Yuan Xie:
Cost-driven 3D design optimization with metal layer reduction technique. ISQED 2013: 294-299 - [c7]Jing Xie, Yang Du, Yuan Xie:
CPDI: Cross-power-domain interface circuit design in monolithic 3D technology. ISQED 2013: 442-447 - 2012
- [c6]Jing Xie, Yu Wang, Yuan Xie:
Yield-aware time-efficient testing and self-fixing design for TSV-based 3D ICs. ASP-DAC 2012: 738-743 - [c5]Jing Xie, Vijaykrishnan Narayanan, Yuan Xie:
Mitigating electromigration of power supply networks using bidirectional current stress. ACM Great Lakes Symposium on VLSI 2012: 299-302 - 2010
- [c4]Jing Xie, Xiangyu Dong, Yuan Xie:
3D memory stacking for fast checkpointing/restore applications. 3DIC 2010: 1-6 - [c3]Tao Zhang, Kui Wang, Yi Feng, Yan Chen, Qun Li, Bing Shao, Jing Xie, Xiaodi Song, Lian Duan, Yuan Xie, Xu Cheng, Youn-Long Lin:
A 3D SoC design for H.264 application with on-chip DRAM stacking. 3DIC 2010: 1-6 - [c2]Jing Xie, Jishen Zhao, Xiangyu Dong, Yuan Xie:
Architectural benefits and design challenges for three-dimensional integrated circuits. APCCAS 2010: 540-543 - [c1]Jin Ouyang, Jing Xie, Matthew Poremba, Yuan Xie:
Evaluation of using inductive/capacitive-coupling vertical interconnects in 3D network-on-chip. ICCAD 2010: 477-482
Coauthor Index
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