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ORCIDKoichi Wada 0002
Person information
- affiliation: University of Tsukuba, Japan
Other persons with the same name
- Koichi Wada 0001
![[0000-0002-5351-1459]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-5351-1459")
(aka: Kouichi Wada 0001) — Hosei University, Tokyo, Japan (and 2 more) - Koichi Wada 0003 — Kobe University, Graduate School of Science and Technology, Japan
- Koichi Wada 0004 — Kobe Eye Center, Japan
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2020 – today
- 2024
[j16]Danhe Tian, Shinichi Yamagiwa, Koichi Wada:
Heuristic Compression Method for CNN Model Applying Quantization to a Combination of Structured and Unstructured Pruning Techniques. IEEE Access 12: 66680-66689 (2024)- 2023
- [c25]Taiki Kato, Shinichi Yamagiwa, Koichi Wada:
Toward Parallelization Technique for Stream-based Lossless Data Compression. IEEE Big Data 2023: 2667-2672 - 2022
- [j15]Danhe Tian, Shinichi Yamagiwa, Koichi Wada:
Heuristic Method for Minimizing Model Size of CNN by Combining Multiple Pruning Techniques. Sensors 22(15): 5874 (2022)
2010 – 2019
- 2016
- [c24]Guyue Wang, Koichi Wada, Shinichi Yamagiwa:
Performance Evaluation of Parallelizing Algorithm Using Spanning Tree for Stream-Based Computing. CANDAR 2016: 497-503 - 2015
- [j14]Shinichi Yamagiwa, Guyue Wang, Koichi Wada:
Development of an Algorithm for Extracting Parallelism and Pipeline Structure from Stream-based Processing flow with Spanning Tree. Int. J. Netw. Comput. 5(1): 159-179 (2015) - 2014
- [c23]Guyue Wang, Shinichi Yamagiwa, Koichi Wada:
Parallelism Extraction Algorithm from Stream-Based Processing Flow Applying Spanning Tree. IPDPS Workshops 2014: 632-641 - 2013
- [c22]Shinichi Yamagiwa, Ryoyu Watanabe, Koichi Wada:
Operation Synchronization Technique on Pipeline-Based Hardware Synthesis Applying Stream-Based Computing Framework. IPDPS Workshops 2013: 761-770 - [c21]Naoki Yonezawa, Ken'ichi Katou, Issei Kino, Koichi Wada:
Probabilistic Analysis of Barrier Eliminating Method Applied to Load-Imbalanced Parallel Application. PPAM (2) 2013: 196-206 - [c20]Naoki Yonezawa, Ken'ichi Katou, Issei Kino, Koichi Wada:
Probabilistic Analysis of Parallel Program with Partially Eliminated Barriers. TrustCom/ISPA/IUCC 2013: 1840-1847 - 2011
- [j13]Naoki Yonezawa, Issei Kino, Koichi Wada:
Probabilistic analysis of time reduction by eliminating barriers in parallel programmes. Int. J. Commun. Networks Distributed Syst. 6(4): 404-419 (2011) - [j12]Pablo Lamilla Álvarez, Shinichi Yamagiwa, Masahiro Arai, Koichi Wada:
A Uniform Platform to Support Multigenerational GPUs for High Performance Stream-based Computing. Int. J. Netw. Comput. 1(2): 230-243 (2011) - [j11]Shinichi Yamagiwa, Koichi Wada:
Performance impact on resource sharing among multiple CPU- and GPU-based applications. Int. J. Parallel Emergent Distributed Syst. 26(4): 313-329 (2011) - [j10]Bo Li, Koichi Wada:
Communication latency tolerant parallel algorithm for particle swarm optimization. Parallel Comput. 37(1): 1-10 (2011) - [c19]Masahiro Arai, Koichi Wada, Shinichi Yamagiwa:
Improving Stream Buffer Management of Stream-Based Computing Platform on GPU. ICNC 2011: 307-312 - [c18]Pablo Lamilla Álvarez, Shinichi Yamagiwa, Masahiro Arai, Koichi Wada:
Elimination Techniques of Redundant Data Transfers Among GPUs and CPU on Recursive Stream-Based Applications. IPDPS Workshops 2011: 708-715 - 2010
- [c17]Shinichi Yamagiwa, Masahiro Arai, Koichi Wada:
Design and Implementation of a Uniform Platform to Support Multigenerational GPU Architectures for High Performance Stream-Based Computing. ICNC 2010: 249-255
2000 – 2009
- 2009
- [c16]Bo Li, Koichi Wada:
Communication Latency Tolerant Parallel Algorithm for Particle Swarm Optimization. FCST 2009: 68-74 - [c15]Shinichi Yamagiwa, Koichi Wada:
Performance study of interference on GPU and CPU resources with multiple applications. IPDPS 2009: 1-8 - 2008
- [c14]Shinichi Yamagiwa, Koichi Wada, Leonel Sousa:
Heuristic Optimization Methods for Improving Performance of Recursive General Purpose Applications on GPUs. ISPDC 2008: 325-332 - 2007
- [j9]Keiichi Aoki, Koichi Wada, Hiroki Maruoka, Masaaki Ono:
Architecture and Performance of Dynamic Offloading Mechanism for Maestro2 Cluster Network. Inf. Media Technol. 2(4): 1093-1102 (2007) - [c13]Keiichi Aoki, Hiroki Maruoka, Koichi Wada, Masaaki Ono:
Performance evaluation of offloading software modules to cluster network. Parallel and Distributed Computing and Networks 2007: 51-56 - 2006
- [j8]Shinichi Yamagiwa, Leonel Sousa, Kevin Ferreira, Keiichi Aoki, Masaaki Ono, Koichi Wada:
Maestro2: Experimental Evaluation of Communication Performance Improvement Techniques in the Link Layer. J. Interconnect. Networks 7(2): 295-318 (2006) - [c12]Keiichi Aoki, Hiroki Maruoka, Koichi Wada, Masaaki Ono:
Architecture and Performance of Dynamic Offloader for Cluster Network. ISPA 2006: 6-17 - [c11]Naoki Yonezawa, Koichi Wada, Takahiro Aida:
Barrier Elimination Based on Access Dependency Analysis for OpenMP. ISPA 2006: 362-373 - 2005
- [c10]Hironori Aokage, Keisuke Kameyama, Koichi Wada:
Image Interpolation using Feedforward Neural Network. Artificial Intelligence and Applications 2005: 861-866 - [c9]Shinichi Yamagiwa, Keiichi Aoki, Koichi Wada:
Active Zero-copy: A performance study of non-deterministic messaging. ISPDC 2005: 325-332 - [c8]Keiichi Aoki, Koichi Wada, Masaaki Ono, Shinichi Yamagiwa:
High Performance Message Passing Library for Maestro2 Cluster Network. Parallel and Distributed Computing and Networks 2005: 199-204 - [c7]Naoki Yonezawa, Koichi Wada, Takahiro Ogura:
Quaver: OpenMP Compiler for Clusters based on Array Section Descriptor. Parallel and Distributed Computing and Networks 2005: 234-239 - [c6]Shinichi Yamagiwa, Keiichi Aoki, Koichi Wada:
Performance Enhancement of Inter-Cluster Communication with Software-based Data Compression Link Layer. IASTED PDCS 2005: 516-523 - 2004
- [c5]Shinichi Yamagiwa, Kevin Ferreira, Luís Miguel Campos, Keiichi Aoki, Masaaki Ono, Koichi Wada, Munehiro Fukuda, Leonel Sousa:
On the performance of Maestro2 high performance network equipment, using new improvement techniques. IPCCC 2004: 103-110 - [c4]Kevin Ferreira, Shinichi Yamagiwa, Leonel Sousa, Keiichi Aoki, Koichi Wada, Luís Miguel Campos:
Distributed Shared Memory System Based on the Maestro2 High Performance Cluster Network. ISPDC/HeteroPar 2004: 91-96 - 2002
- [j7]Koichi Wada, Shinichi Yamagiwa, Munehiro Fukuda:
High Performance Network of PC Cluster Maestro. Clust. Comput. 5(1): 33-42 (2002) - [j6]Kazuo Toraichi, Paul Wing Hing Kwan, Kazuki Katagishi, Tetsuo Sugiyama, Koichi Wada, Mitsuru Mitsumoto, Hiroyasu Nakai, Fumito Yoshikawa:
On a Fluency Image Coding System for Beef Marbling Evaluation. Pattern Recognit. Lett. 23(11): 1277-1291 (2002) - [c3]Fumio Kawazoe, Kazuo Toraichi, Paul Wing Hing Kwan, Koichi Wada:
A Method on Tracking Unit Pixel Width Line Segments for Function Approximation-Based Image Coding. IEEE Pacific Rim Conference on Multimedia 2002: 502-509 - 2000
- [j5]Fumito Yoshikawa, Kazuo Toraichi, Koichi Wada, Nobuyuki Otsu, Hiroyasu Nakai, Mitsuru Mitsumoto, Kazuki Katagishi:
On a grading system for beef marbling. Pattern Recognit. Lett. 21(12): 1037-1050 (2000) - [j4]Takateru Kyogoku, Yukari Hamada, Tetsuya Murakami, Koichi Wada:
Efficient event communication algorithm and its evaluation for parallel logic simulation. Syst. Comput. Jpn. 31(8): 59-67 (2000) - [j3]Motoko Obata, Koichi Wada, Kazuo Toraichi, Koichi Mori, Masakazu Ohira:
An approximation of data points by piecewise polynomial functions and their dual orthogonal functions. Signal Process. 80(3): 507-514 (2000) - [c2]Shinichi Yamagiwa, Munehiro Fukuda, Koichi Wada:
Design and Performance of Maestro Cluster Network. CLUSTER 2000: 35-44
1990 – 1999
- 1998
- [j2]Koichi Wada, Koichi Mori, Kazuo Toraichi:
PaRM: A parallel relaxation machine for handwritten character recognition. Pattern Recognit. Lett. 19(5-6): 475-481 (1998) - [c1]Shinichi Yamagiwa, Masaaki Ono, Takeshi Yamazaki, Pusit Kulkasem, Masayuki Hirota, Koichi Wada:
Maestro-Link: A High Performance Interconnect for PC Cluster. FPL 1998: 421-425
1980 – 1989
- 1987
- [j1]Mohammad A. Sanamrad, Koichi Wada, Haruya Matsumoto:
A Hardware Syntactic Analysis Processor. IEEE Micro 7(4): 73-80 (1987)
Coauthor Index
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