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ORCIDAhmed E. Barbour
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2000 – 2009
- 2004
[c9]Khaled Shuaib, Ahmed E. Barbour:
Network Strategic Planning and Requirements for Migrating to IP Telephony. International Conference on Internet Computing 2004: 309-312- [c8]Ahmed E. Barbour:
Modeling and Performance Analysis of a Healthcare Admission and Utilization Processes using Visual SLAM and AweSim Simulation Package. MSV/AMCS 2004: 176-182 - 2002
- [c7]Ahmed E. Barbour, Mekki Terbeche:
Simulation a Day Trader stock Market Dynamic Activity Using visual SLAM (AweSim) Software Package. IC-AI 2002: 1123-1129
1990 – 1999
- 1997
- [c6]Ahmed E. Barbour, Mike P. Nassif:
Basic Concepts of Hardware Verification Using ORA Larch/VHDL. PDPTA 1997: 778-782 - [c5]Ahmed E. Barbour:
A Hypercube Minimization Algorithm for Boolean Function. PDPTA 1997: 811-815 - 1993
- [j3]Charles E. Stroud, Ahmed E. Barbour:
Testability and test generation for majority voting fault-tolerant circuits. J. Electron. Test. 4(3): 201-214 (1993) - 1992
- [j2]Ahmed E. Barbour:
Solutions to the Minimization Problem of Fault-Tolerant Logic Circuits. IEEE Trans. Computers 41(4): 429-443 (1992) - [c4]Ahmed E. Barbour:
Test patterns for fault-tolerant logic circuits using block design concepts. ACM Southeast Regional Conference 1992: 228-235 - 1990
- [c3]Charles E. Stroud, Ahmed E. Barbour:
Parallel Processing and Hardware Acceleration for Synthesis of VLSI Devices from Behavioral Models. ICPP (1) 1990: 470-473
1980 – 1989
- 1989
- [j1]Ahmed E. Barbour, Anthony S. Wojcik:
A General, Constructive Approach to Fault-Tolerant Design Using Redundancy. IEEE Trans. Computers 38(1): 15-29 (1989) - [c2]Charles E. Stroud, Ahmed E. Barbour:
Design for Testability and Test Generation for Static Redundancy System Level Fault-Tolerant Circuits. ITC 1989: 812-818 - 1987
- [c1]Ahmed E. Barbour:
Dynamic partitioning of Banyan networks. Simulation of Computer Networks 1987: 208-214
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