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Nikolaos Kefalas

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2020 – today

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2022
[c7]
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Nikolaos Kefalas, George Theodoridis:
An FPGA implementation of the VESA Display Stream Compression decoder. VLSI-SoC 2022: 1-6

2010 – 2019

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2019
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Nikolaos Kefalas, George Theodoridis:
Low-memory and high-performance architectures for the CCSDS 122.0-B-1 compression standard. Integr. 69: 85-97 (2019)
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Nikolaos Kefalas, George Theodoridis:
Implementing VESA Display Stream Compression Encoder in FPGAs. PATMOS 2019: 35-40
2018
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Nikolaos Kefalas, George Theodoridis:
A High Performance Bitplane Encoder for the CCSDS 122.0-B-1 Compression Standard. TSP 2018: 1-7
2017
[c4]
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Nikolaos Kefalas, George Theodoridis:
High-throughput FPGA implementation of the CCSDS 122.0-B-1 compression standard. PATMOS 2017: 1-8
2015
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Nikolaos Kefalas, George Theodoridis:
A high performance 5 stage pipeline architecture for the H.264/AVC deblocking filter. Integr. 49: 65-77 (2015)
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Nikolaos Kefalas, George Theodoridis:
A parallel luma-chroma filtering architecture for H.264/AVC deblocking filter. ICCE-Berlin 2015: 273-276
2014
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Nikolaos Kefalas, George Theodoridis:
An 8K-UHD capable 8-stage pipeline deblocking filter for H.264/AVC. ISCCSP 2014: 570-573
2010
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Nikolaos Kefalas, George Theodoridis:
A high throughput pipelined architecture for H.264/AVC deblocking filter. ICECS 2010: 387-391

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