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Chun-Hsien Lu
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2010 – 2019
- 2014
- [j3]Hung-Lin Chao, Cheng-Chien Wu, Chun-Yang Peng, Chun-Hsien Lu, Jih-Sheng Shen, Pao-Ann Hsiung:
Dynamic partially reconfigurable architecture for fast Fourier transform computation. Int. J. Embed. Syst. 6(2/3): 207-215 (2014) - 2013
- [c5]Hung-Lin Chao, Chun-Yang Peng, Cheng-Chien Wu, Ken-Shin Huang, Chun-Hsien Lu, Jih-Sheng Shen, Pao-Ann Hsiung:
Spatio-Temporally-Shared Reconfigurable Fast Fourier Transform architecture design. FPT 2013: 426-429 - 2011
- [j2]Chao-Sheng Lin, Chun-Hsien Lu, Shang-Wei Lin, Yean-Ru Chen, Pao-Ann Hsiung:
VERTAF/Multi-Core: A SysML-Based Application Framework for Multi-Core Embedded Software Development. J. Comput. Sci. Technol. 26(3): 448-462 (2011) - 2010
- [j1]Chun-Hsien Lu, Hsiao-Win Liao, Pao-Ann Hsiung:
Multi-objective placement of reconfigurable hardware tasks in real-time system. Int. J. Embed. Syst. 4(3/4): 195-203 (2010)
2000 – 2009
- 2009
- [c4]Chun-Hsien Lu, Hsiao-Win Liao, Pao-Ann Hsiung:
Multi-objective Placement of Reconfigurable Hardware Tasks in Real-Time System. CSE (2) 2009: 921-925 - [c3]Pao-Ann Hsiung, Chao-Sheng Lin, Shang-Wei Lin, Yean-Ru Chen, Chun-Hsien Lu, Sheng-Ya Tong, Wan-Ting Su, Chihhsiong Shih, Chorng-Shiuh Koong, Nien-Lin Hsueh, Chih-Hung Chang, William C. Chu:
VERTAF/Multi-Core: A SysML-Based Application Framework for Multi-Core Embedded Software Development. ICA3PP 2009: 303-314 - [c2]Pao-Ann Hsiung, Shang-Wei Lin, Yean-Ru Chen, Nien-Lin Hsueh, Chih-Hung Chang, Chihhsiong Shih, Chorng-Shiuh Koong, Chao-Sheng Lin, Chun-Hsien Lu, Sheng-Ya Tong, Wan-Ting Su, William C. Chu:
Model-driven development of multi-core embedded software. IWMSE@ICSE 2009: 9-16 - 2007
- [c1]Pao-Ann Hsiung, Shang-Wei Lin, Chin-Chieh Hung, Jih-Ming Fu, Chao-Sheng Lin, Cheng-Chi Chiang, Kuo-Cheng Chiang, Chun-Hsien Lu, Pin-Hsien Lu:
Real-Time Embedded Software Design for Mobile and Ubiquitous Systems. EUC 2007: 718-729
Coauthor Index
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