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2020 – today
- 2022
[c26]Steffen Wendzel, Luca Caviglione, Bernhard Fechner:
Steganography Hiding Patterns: A Brief Review. EICC 2022: 107-108
2010 – 2019
- 2018
- [j8]Kai Engel, Bernhard Fechner, Alicja Berthold-Kraiczy, Andreas Homrighausen, Ruth Dillhage:
Anforderungsmanagement in großen IT-Projekten. Inform. Spektrum 41(3): 181-188 (2018) - 2016
- [j7]Sebastian Weis, Arne Garbade, Bernhard Fechner
, Avi Mendelson, Roberto Giorgi, Theo Ungerer:
Architectural Support for Fault Tolerance in a Teradevice Dataflow System. Int. J. Parallel Program. 44(2): 208-232 (2016) - 2015
- [j6]Steffen Wendzel, Sebastian Zander, Bernhard Fechner, Christian Herdin:
Pattern-Based Survey and Categorization of Network Covert Channel Techniques. ACM Comput. Surv. 47(3): 50:1-50:26 (2015) - 2014
- [j5]Roberto Giorgi, Rosa M. Badia, François Bodin, Albert Cohen, Paraskevas Evripidou, Paolo Faraboschi, Bernhard Fechner, Guang R. Gao, Arne Garbade, Rahulkumar Gayatri, Sylvain Girbal, Daniel Goodman, Behram Khan, Souad Koliai, Joshua Landwehr, Nhat Minh Lê, Feng Li, Mikel Luján, Avi Mendelson, Laurent Morin, Nacho Navarro, Tomasz Patejko, Antoniu Pop, Pedro Trancoso, Theo Ungerer, Ian Watson, Sebastian Weis, Stéphane Zuckerman, Mateo Valero:
TERAFLUX: Harnessing dataflow in next generation teradevices. Microprocess. Microsystems 38(8): 976-990 (2014) - [c25]Nizar Msadek, Rolf Kiefhaber, Bernhard Fechner, Theo Ungerer:
Trust-Enhanced Self-configuration for Organic Computing Systems. ARCS 2014: 37-48 - [i1]Steffen Wendzel, Sebastian Zander, Bernhard Fechner, Christian Herdin:
A Pattern-based Survey and Categorization of Network Covert Channel Techniques. CoRR abs/1406.2901 (2014) - 2013
- [c24]Marco Solinas, Rosa M. Badia, François Bodin, Albert Cohen, Paraskevas Evripidou, Paolo Faraboschi, Bernhard Fechner, Guang R. Gao, Arne Garbade, Sylvain Girbal, Daniel Goodman, Behram Khan, Souad Koliai, Feng Li, Mikel Luján, Laurent Morin, Avi Mendelson, Nacho Navarro, Antoniu Pop, Pedro Trancoso, Theo Ungerer, Mateo Valero, Sebastian Weis, Ian Watson, Stéphane Zuckerman, Roberto Giorgi:
The TERAFLUX Project: Exploiting the DataFlow Paradigm in Next Generation Teradevices. DSD 2013: 272-279 - [c23]Bernhard Fechner, Arne Garbade, Sebastian Weis, Theo Ungerer:
Fault detection and tolerance mechanisms for future 1000 core systems. HPCS 2013: 552-554 - [c22]Arne Garbade, Sebastian Weis, Sebastian Schlingmann, Bernhard Fechner, Theo Ungerer:
Fault Localization in NoCs Exploiting Periodic Heartbeat Messages in a Many-Core Environment. IPDPS Workshops 2013: 791-795 - [c21]Arne Garbade, Sebastian Weis, Sebastian Schlingmann, Bernhard Fechner, Theo Ungerer:
Impact of Message Based Fault Detectors on Applications Messages in a Network on Chip. PDP 2013: 470-477 - 2012
- [j4]Bernhard Fechner:
A multilevel fault model for integrated parallel fault-tolerant systems. Concurr. Comput. Pract. Exp. 24(7): 687-698 (2012) - [j3]Bernhard Fechner:
3, 14159... oder die näherungsweise Berechnung von π. Inform. Spektrum 35(3): 215-219 (2012) - [j2]Bernhard Fechner:
Fast online error detection and correction with thread signature calculae. Microprocess. Microsystems 36(6): 462-470 (2012) - [c20]Bernhard Fechner, Arne Garbade, Sebastian Weis, Theo Ungerer:
Fault Localization in NoCs by Timed Heartbeats. ARCS Workshops 2012: 191-200 - [c19]Bernhard Fechner:
Challenges for the manycore era: From dawn to dusk(?). HPCS 2012: 411 - [c18]Julian Wolf, Bernhard Fechner, Theo Ungerer:
Fault coverage of a timing and control flow checker for hard real-time systems. IOLTS 2012: 127-129 - [c17]Julian Wolf, Bernhard Fechner, Sascha Uhrig, Theo Ungerer:
Fine-grained timing and control flow error checking for hard real-time task execution. SIES 2012: 257-266 - 2011
- [c16]Bernhard Fechner:
Reliability Bottlenecks in Integrated Parallel Fault-Tolerant Systems. ARCS Workshops 2011 - 2010
- [j1]Bernhard Fechner, Andre Osterloh:
A meta-level true random number generator. Int. J. Crit. Comput. Based Syst. 1(1/2/3): 267-279 (2010) - [c15]Bernhard Fechner:
GPU-Based Parallel Signature Scanning and Hash Generation. ARCS Workshops 2010: 133-138
2000 – 2009
- 2009
- [b2]Bernhard Fechner:
Transiente Fehler in Mikroprozessoren: Mechanismen zur Erkennung, Behebung und Tolerierung. FernUniversität in Hagen, Vieweg + Teubner, Germany 2009, ISBN 978-3-8348-0714-4, pp. 1-265 - [c14]Bernhard Fechner:
Fault-Masking Capabilities of Basic Circuit Structures. DepCoS-RELCOMEX 2009: 245-253 - [c13]Bernhard Fechner, Oliver Körber:
A Tool for Dependable and Distributable Presentations. DepCoS-RELCOMEX 2009: 254-260 - 2008
- [b1]Bernhard Fechner:
Dynamische Fehlererkennungs- und behebungsmechanismen für verlässliche Mikroprozessoren. FernUniversität in Hagen, 2008, pp. 1-187 - [c12]Bernhard Fechner, Andre Osterloh:
A True Random Number Generator with Built-in Attack Detection. DepCoS-RELCOMEX 2008: 111-118 - [c11]Bernhard Fechner, Udo Hönig, Jörg Keller, Wolfram Schiffmann:
Fault-tolerant static scheduling for grids. IPDPS 2008: 1-6 - 2007
- [c10]Bernhard Fechner, Andre Osterloh:
Transient Fault Detection in State-Automata. DepCoS-RELCOMEX 2007: 99-106 - 2006
- [c9]Bernhard Fechner:
Microcode with Embedded Timing Constraints. ARCS Workshops 2006: 45-51 - [c8]Bernhard Fechner:
Analysis of checksum-based execution schemes for pipelined processors. IPDPS 2006 - [c7]Bernhard Fechner, Jörg Keller, Andreas Wohlfeld:
Web server protection by customized instruction set encoding. IPDPS 2006 - [c6]Bernhard Fechner:
A Fault-Tolerant Dynamic Fetch Policy for SMT Processors in Multi-Bus Environments. PARELEC 2006: 31-36 - [c5]Bernhard Fechner:
A Result Propagation Scheme for Redundant Multithreaded Systems. PDPTA 2006: 64-69 - 2005
- [c4]Irene Eusgeld, Bernhard Fechner, Felix Salfner, Max Walter, Philipp Limbourg, Lijun Zhang:
Hardware Reliability. Dependability Metrics 2005: 59-103 - [c3]Bernhard Fechner:
Dynamic Delay-Fault Injection for Reconfigurable Hardware. IPDPS 2005 - 2004
- [c2]Bernhard Fechner, Jörg Keller, Peter Sobe:
Performance Estimation of Virtual Duplex Systems on Simultaneous Multithreaded Processors. IPDPS 2004 - [c1]Bernhard Fechner, Jörg Keller:
A Fault-Tolerant Voting Scheme for Multithreaded Environments. PARELEC 2004: 237-239
Coauthor Index
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