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ORCIDXiaoqiang Zhang 0001
Person information
- affiliation: Nanjing University, School of Electronic Science and Engineering, Nanjing, China
- affiliation: Anhui Polytechnic University, College of Electrical Engineering, Wuhu, China
- affiliation: Nanjing University of Aeronautics and Astronautics, College of Electrical and Information Engineering, Nanjing, China
Other persons with the same name
- Xiaoqiang Zhang — disambiguation page
- Xiaoqiang Zhang 0002 — Southwest University of Science and Technology, School of Information Engineering, Mianyang, China (and 1 more)
- Xiaoqiang Zhang 0003
![[0000-0002-7686-2841]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-7686-2841")
— China University of Mining and Technology, School of Information and Control Engineering, Engineering Research Center of Intelligent Control for Underground Space, Xuzhou, China (and 2 more) - Xiaoqiang Zhang 0004 — China Agricultural University, College of Information and Electrical Engineering, Beijing, China (and 1 more)
- Xiaoqiang Zhang 0005 — National University of Defense Technology, College of Electronic Science, Changsha, China
- Xiaoqiang Zhang 0006 — Baidu Inc., Department of Computer Vision Technology, China
- Xiaoqiang Zhang 0007 — Jiangxi University of Finance and Economics, School of Information Technology, Nanchang, China
- Xiaoqiang Zhang 0008 — IMEC, Leuven, Belgium
- Xiaoqiang Zhang 0009 — Civil Aviation Flight University of China, Aviation Engineering Institute, Guanghan, China
- Xiaoqiang Zhang 0010 — Sun Yat-sen University, School of Electronics and Information Technology, Guangzhou, China
- Xiaoqiang Zhang 0011 — Southwest Jiaotong University, School of Transportation and Logistics, Chengdu, China (and 1 more)
- Xiaoqiang Zhang 0012 — Nanjing University, School of Management and Engineering, Nanjing, China
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2020 – today
- 2022
[j17]Xiaoqiang Zhang, Lan Tang, Xinggan Zhang, Xinxing Zheng, Mingyu Xu, Fan Yang:
Low delay AES S-box designs based on matrix merging method. IEICE Electron. Express 19(11): 20220154 (2022)- 2021
- [j16]Tianming Ni, Zhao Yang, Hao Chang, Xiaoqiang Zhang, Lin Lu, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen:
A Novel TDMA-Based Fault Tolerance Technique for the TSVs in 3D-ICs Using Honeycomb Topology. IEEE Trans. Emerg. Top. Comput. 9(2): 724-734 (2021) - 2020
- [j15]Xiaoqiang Zhang, Xinggan Zhang, Lan Tang, Xinxing Zheng, Tianming Ni, Ning Wu:
A low critical path delay structure for composite field AES S-box based on constant matrices multiplication merging. IEICE Electron. Express 17(7): 20200035 (2020) - [j14]Xiaoqiang Zhang, Fan Yang, Xinxing Zheng, Xinggan Zhang, Ning Wu:
A full matrix joint optimization method for hardware implementation of AES MixColumns/InvMixColumns. IEICE Electron. Express 17(24): 20200391 (2020)
2010 – 2019
- 2019
- [j13]Fang Zhou, Ning Wu, Xiaoqiang Zhang, Jinbao Zhang:
A new method for resisting collision attack based on parallel random delay S-box. IEICE Electron. Express 16(11): 20190192 (2019) - [c1]Tao Cheng, Ning Wu, Gaizhen Yan, Xinggan Zhang, Xiaoqiang Zhang:
Poet: A Power Efficient Hybrid Optical NoC Topology for Heterogeneous CPU-GPU Systems. IECON 2019: 3091-3095 - 2018
- [j12]Yong Zhang, Ning Wu, Fang Zhou, Xiaoqiang Zhang, Jinbao Zhang:
High performance AES-GCM implementation based on efficient AES and FR-KOA multiplier. IEICE Electron. Express 15(14): 20180559 (2018) - [j11]Tianming Ni, Hao Chang, Xiaoqiang Zhang, Hao Xiao, Zhengfeng Huang:
Research on physical unclonable functions circuit based on three dimensional integrated circuit. IEICE Electron. Express 15(23): 20180782 (2018) - [j10]Yasir Khizar, Ning Wu, Xiaoqiang Zhang:
Compact Hardware Implementations of MISTY1 Block Cipher. J. Circuits Syst. Comput. 27(3): 1850037:1-1850037:14 (2018) - [j9]Yunfei Ye, Ning Wu, Xiaoqiang Zhang, Liling Dong, Fang Zhou:
An Optimized Design for Compact Masked AES S-Box Based on Composite Field and Common Subexpression Elimination Algorithm. J. Circuits Syst. Comput. 27(11): 1850171:1-1850171:11 (2018) - 2017
- [j8]Yaoping Liu, Ning Wu, Xiaoqiang Zhang, Fang Zhou:
A new compact hardware architecture of S-Box for block ciphers AES and SM4. IEICE Electron. Express 14(11): 20170358 (2017) - [j7]Yasir Khizar, Ning Wu, Xin Chen, Muhammad Rehan Yahya, Xiaoqiang Zhang:
FPGA based highly efficient MISTY1 architecture. IEICE Electron. Express 14(18): 20170841 (2017) - 2016
- [j6]Xiaoqiang Zhang, Ning Wu, Fang Zhou, Jianhua Li, Yasir Khizar:
Low-delay parallel Chien search architecture for RS decoder. IEICE Electron. Express 13(19): 20160729 (2016) - [j5]Jinbao Zhang, Ning Wu, Xiaoqiang Zhang, Fang Zhou:
Against fault attacks based on random infection mechanism. IEICE Electron. Express 13(21): 20160872 (2016) - [j4]Xiaoqiang Zhang, Ning Wu, Fang Zhou, Fen Ge:
Optimization of Area and Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box. J. Circuits Syst. Comput. 25(5): 1650037:1-1650037:29 (2016) - 2015
- [j3]Jianhua Li, Ning Wu, Yongliang Hu, Xiaoqiang Zhang:
High-performance adaptive hybrid wireless NoC architecture based on improved congestion measurement. IEICE Electron. Express 12(12): 20150331 (2015) - [j2]Xinjie Huang, Ning Wu, Xiaoqiang Zhang, Yaoping Liu:
An evolutionary algorithm based on novel hybrid repair strategy for combinational logic circuits. IEICE Electron. Express 12(22): 20150765 (2015) - 2014
- [j1]Xiaoqiang Zhang, Ning Wu, Fang Zhou, Xin Chen:
An optimized delay-aware common subexpression elimination algorithm for hardware implementation of binary-field linear transform. IEICE Electron. Express 11(22): 20140934 (2014)
Coauthor Index
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