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2020 – today
- 2021
[c11]Eric Thian Aun Tan, Sabyasachi Mohapatra, Keanhong Boey:
Design and implementation of GPIO subsystem using external foundry I/O buffer. APCCAS 2021: 109-112
2010 – 2019
- 2011
- [c10]Philip Hodgers, Keanhong Boey, Máire O'Neill:
Power Spectral Density Side Channel Attack Overlapping Window Method. DSD 2011: 274-278 - [c9]Keanhong Boey, Máire O'Neill, Roger F. Woods
:
How Resistant are Sboxes to Power Analysis Attacks? NTMS 2011: 1-6 - [c8]Philip Hodgers, Keanhong Boey, Máire O'Neill:
Variable window power spectral density attack. WIFS 2011: 1-6 - 2010
- [c7]Keanhong Boey, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Random clock against differential power analysis. APCCAS 2010: 756-759 - [c6]Yingxi Lu, Keanhong Boey, Philip Hodgers, Máire O'Neill:
SEED masking implementations against power analysis attacks. APCCAS 2010: 1199-1202 - [c5]Yingxi Lu, Keanhong Boey, Philip Hodgers, Máire O'Neill:
Lightweight DPA resistant solution on FPGA to counteract power models. FPT 2010: 178-183 - [c4]Keanhong Boey, Philip Hodgers, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Security of AES Sbox designs to power analysis. ICECS 2010: 1232-1235 - [c3]Keanhong Boey, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Differential Power Analysis of CAST-128. ISVLSI 2010: 143-148
2000 – 2009
- 2009
- [c2]Yingxi Lu, Keanhong Boey, Máire O'Neill, John V. McCanny, Akashi Satoh:
Is the differential frequency-based attack effective against random delay insertion? SiPS 2009: 051-056 - 2008
- [c1]Keanhong Boey, Kok Sing Yap, Wai Mun Ng:
USB2.0 Logic Built In Self Test Methodology. ATS 2008: 266
Coauthor Index
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