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ORCIDMarcelo Daniel Berejuck
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2020 – today
- 2021
[j4]Rodrigo V. M. Pereira, Laio Oriel Seman, Marcelo Daniel Berejuck, Douglas Rossi de Melo, Analúcia Schiaffino Morales
, Eduardo Augusto Bezerra:
MPI hardware framework for many-core based embedded systems. Int. J. Sens. Networks 35(1): 42-56 (2021)- [c6]Emilio Werner, Jhennifer Cristine Matias, Marcelo Daniel Berejuck, Hamadou Saliah-Hassane:
Evaluation of blockchain techniques to ensure secure access on remote FPGA laboratories. ISDFS 2021: 1-6 - [c5]Marcelo Daniel Berejuck, Jhennifer Cristine Matias, Emilio Werner, Hamadou Saliah-Hassane:
Work-in Progress: Development of an E-learning FPGA Platform Following the IEEE SA Std. 1876 - 2019 Standard for Networked Smart Learning Objects for Online Laboratories. REV 2021: 3-9 - [c4]Emilio Werner, Jhennifer Cristine Matias, Marcelo Daniel Berejuck, Hamadou Saliah-Hassane:
Main Attacks and Ways to Keep Security Guidelines Updated in Remote Laboratories. REV 2021: 115-121 - 2020
- [j3]Julian J. Lopez-Salamanca, Laio Oriel Seman, Marcelo Daniel Berejuck, Eduardo A. Bezerra:
Finite-State Markov Chains Channel Model for CubeSats Communication Uplink. IEEE Trans. Aerosp. Electron. Syst. 56(1): 142-154 (2020)
2010 – 2019
- 2019
- [c3]Gabriel Ganzer, Marcelo Daniel Berejuck:
Dedicated monitoring service without routing mitigation for Networks-on-Chip. LASCAS 2019: 121-124 - 2018
- [j2]Victor M. Goncalves Martins, Paulo Ricardo Cechelero Villa, Rodrigo Travessini, Marcelo Daniel Berejuck, Eduardo Augusto Bezerra:
A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs. Microelectron. Reliab. 83: 50-63 (2018) - 2017
- [c2]Rodrigo V. M. Pereira, Fernando Rangel de Sousa, Eduardo Augusto Bezerra, Marcelo Daniel Berejuck:
A Digital Implementation of Eddystone Standard Using IBM 180nm Cell Library. SBESC 2017: 161-166 - 2016
- [j1]Marcelo Daniel Berejuck, Antônio Augusto Fröhlich:
Evaluation of a Connectionless Technique for System-on-Chip Interconnection. J. Circuits Syst. Comput. 25(10): 1630005:1-1630005:26 (2016) - [i3]Marcelo Daniel Berejuck:
An overview about Networks-on-Chip with multicast suppor. CoRR abs/1610.00751 (2016) - 2015
- [i2]Marcelo Daniel Berejuck:
Network-on-Chip with load balancing based on interleave of flits technique. CoRR abs/1510.06791 (2015) - 2014
- [i1]Marcelo Daniel Berejuck, Antônio Augusto Fröhlich:
Evaluation of silicon consumption for a connectionless Network-on-Chip. CoRR abs/1411.3492 (2014)
2000 – 2009
- 2009
- [c1]Marcelo Daniel Berejuck, César Albenes Zeferino:
Adding mechanisms for QoS to a network-on-chip. SBCCI 2009
Coauthor Index
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