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Srinivasa Vemuru
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2010 – 2019
- 2015
- [c21]Yogesh Kumar, Vijay K. Devabhaktuni, Srinivasa Vemuru:
Comparison of power system simulation tools with load flow study cases. EIT 2015: 290-294 - 2014
- [c20]Kavya Vittala, Srinivasa Vemuru, Mohammed Y. Niamat:
FPGA interconnect modeling for lifetime failure detection. EIT 2014: 280-283 - [c19]Srinivasa Vemuru, Peng Wang, Mohammed Y. Niamat:
Majority logic gate synthesis approaches for post-CMOS logic circuits: A review. EIT 2014: 284-289 - [p1]Peng Wang, Mohammed Y. Niamat, Srinivasa Vemuru:
Majority Logic Synthesis Based on Nauty Algorithm. Field-Coupled Nanocomputing 2014: 111-132 - 2013
- [c18]Santhoshi Snigdha Buddala, Srinivasa Vemuru, Vijay K. Devabhaktuni:
Small signal modeling of diode in a parallel module subjected to partial shading. EIT 2013: 1-5 - [c17]Sandeep Patil, Srinivasa Vemuru, Vijay K. Devabhaktuni, Khalid S. Al-Olimat:
Comparison of multilevel DC-DC converter topologies. EIT 2013: 1-5 - [c16]Sami Khorbotly, Khalid S. Al-Olimat, Srinivasa R. Vemuru:
System design: A novel, project-based course connecting the dots of the electrical engineering curriculum. FIE 2013: 855-860 - [c15]Srinivasa Vemuru, Sami Khorbotly, Firas Hassan:
A spiral learning approach to hardware description languages. ISCAS 2013: 2759-2762 - 2012
- [c14]SaiDeepa Rayaprolu, Srinivasa Vemuru, Mohammed Y. Niamat:
Efficient AFT implementation in FPGAs to detect potential electromigration failures. EIT 2012: 1-6 - [c13]Srinivasa Vemuru, Priyanka Singh, Mohammed Y. Niamat:
Modeling impact of bypass diodes on photovoltaic cell performance under partial shading. EIT 2012: 1-5 - 2011
- [c12]Priyanka Singh, Mohammed Y. Niamat, Srinivasa Vemuru:
Modeling of Random Shading Effects in Solar Cells. ICSEng 2011: 86-90 - 2010
- [c11]Srinivasa Vemuru, Sravani Kristem, Mohammed Y. Niamat:
Built-In Self-Test Circuit Optimization for Embedded Cores. CDES 2010: 88-92 - [c10]Mohammed Y. Niamat, Tejas Raviraj, Sowmya Panuganti, Srinivasa Vemuru:
Quantum-Dot Cellular Automata Implementation of FPGA Configurable Logic Blocks. CDES 2010: 182-188 - [c9]Barath Vasudevan, Mohammed Y. Niamat, Mansoor Alam, Srinivasa Vemuru:
Analysis and test of electromigration failures in FPGAs. ISCAS 2010: 3905-3908
2000 – 2009
- 2008
- [c8]Srinivasa Vemuru, Ahmed Elkammar, Norman Scheinberg:
Subbus Control Line Impact on Effectiveness of Bus Encoding Schemes. CDES 2008: 201-206 - 2007
- [j1]Laurence Tianruo Yang, José G. Delgado-Frias, Yiming Li, Mohammed Y. Niamat, Dimitrios Soudris, Srinivasa Vemuru:
Preface. Integr. 40(2): 61 (2007) - 2006
- [c7]Ahmed Elkammar, Norman Scheinberg, Srinivasa Vemuru:
Bus Encoding Scheme To Eliminate Unwanted Signal Transitions. DELTA 2006: 472-480 - 2005
- [c6]Mohammed Y. Niamat, Aditya Ravinuthala, Mohsin M. Jamali, Srinivasa Vemuru:
BIST for Embedded SRAMs in System on Chips. ESA 2005: 74-80 - 2004
- [c5]Ahmed Elkammar, Srinivasa Vemuru, Norman Scheinberg:
A Bus Encoding Scheme to Reduce Power Consuming Signal Transitions. ESA/VLSI 2004: 12-17 - 2003
- [c4]Nathaniel Bird, Ethan S. Miller, Paul J. Pfeiffer, Srinivasa Vemuru:
Channel Routing with Crosstalk Consideration. VLSI 2003: 119-124 - [c3]Srinivasa Vemuru:
Simultaneous Switching Noise Estimation Including the Effects of the Driving Transistor Gate-Source Capacitance. VLSI 2003: 373-378
1990 – 1999
- 1994
- [c2]Srinivasa Vemuru:
Scaling of serially-connected MOSFET chains. Great Lakes Symposium on VLSI 1994: 200-203 - 1993
- [c1]Srinivasa Vemuru, Norman Scheinberg, Edwyn Smith:
Short-circuit Power Dissipation Formulae for CMOS Gates. ISCAS 1993: 1333-1336
Coauthor Index
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