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ORCIDKyeongsoon Cho
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Journal Articles
- 2015
[j4]Soojin Kim, Kyeongsoon Cho:
Design of High-Performance HOG Feature Calculation Circuit for Real-Time Pedestrian Detection. J. Inf. Sci. Eng. 31(6): 2055-2073 (2015)- 2014
- [j3]Soojin Kim, Kyeongsoon Cho:
Efficient Pedestrian Detection Using Multi-Scale HOG Features with Low Computational Complexity. IEICE Trans. Inf. Syst. 97-D(2): 366-369 (2014) - [j2]Soojin Kim, Kyeongsoon Cho:
Fast Calculation of Histogram of Oriented Gradient Feature by Removing Redundancy in Overlapping Block. J. Inf. Sci. Eng. 30(6): 1719-1731 (2014) - 2006
- [j1]Seonyoung Lee, Kyeongsoon Cho:
An Efficient Architecture of High-Performance Deblocking Filter for H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(6): 1736-1739 (2006)
Conference and Workshop Papers
- 2013
- [c12]Soojin Kim, Kyeongsoon Cho:
Trade-off between accuracy and speed for pedestrian detection using HOG feature. ICCE-Berlin 2013: 207-209 - 2012
- [c11]Soojin Kim, Seonyoung Lee, Kyeongsoon Cho:
Design of high-speed support vector machine circuit for driver assistance system. ISOCC 2012: 45-48 - [c10]Soojin Kim, Seonyoung Lee, Kyoungwon Min, Kyeongsoon Cho:
Design of unified support vector machine circuit for pedestrians and cars detection. NEWCAS 2012: 45-48 - 2011
- [c9]Soojin Kim, Kyeongsoon Cho:
Design of high-speed clock recovery circuit for burst-mode applications. ISCAS 2011: 177-180 - [c8]Sangkyun Park, Seonyoung Lee, Soojin Kim, Kyeongsoon Cho:
Design of AdaBoost classifier circuit using Haar-like features for automobile applications. ISOCC 2011: 262-265 - 2010
- [c7]Hoyoung Chang, Kyeongsoon Cho:
High-performance inverse transform circuit based on butterfly architecture for H.264 high profile decoder. APCCAS 2010: 394-397 - 2009
- [c6]Hoyoung Chang, Soojin Kim, Seonyoung Lee, Kyeongsoon Cho:
High-performance architecture of H.264 integer-pixel motion estimation IP for real-time 1080HD video CODEC. SoCC 2009: 419-422 - 2008
- [c5]Seonyoung Lee, Kyeongsoon Cho:
Design of high-performance transform and quantization circuit for unified video CODEC. APCCAS 2008: 1450-1453 - 2007
- [c4]Seonyoung Lee, Kyeongsoon Cho:
Design of Transform and Quantization Circuit for Multi-Standard Integrated Video Decoder. SiPS 2007: 181-186 - 2006
- [c3]Seonyoung Lee, Kyeongsoon Cho:
Implementation of an AMBA-Compliant IP for H.264 Transform and Quantization. APCCAS 2006: 1071-1074 - 1989
- [c2]Kyeongsoon Cho, Randal E. Bryant:
Test Pattern Generation for Sequential MOS Circuits by Symbolic Fault Simulation. DAC 1989: 418-423 - 1987
- [c1]Randal E. Bryant, Derek L. Beatty, Karl S. Brace, Kyeongsoon Cho, Thomas J. Sheffler:
COSMOS: A Compiled Simulator for MOS Circuits. DAC 1987: 9-16
Coauthor Index
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