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ORCIDClemenz L. Portmann
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2010 – 2019
- 2011
[c2]Andrew K. Joy, Hugh Mair, Hae-Chang Lee, Arnold Feldman, Clemenz L. Portmann, Neil Bulman, Eugenia Cordero Crespo, Peter Hearne, Patty Huang, Ben Kerr, Pulkit Khandelwal, Franz Kuhlmann, Shaun Lytollis, Joaquim Machado, Casey Morrison, Scott Morrison, Shahriar Rabii, Dushmantha Rajapaksha, Vishnu Ravinuthula, Giuseppe Surace:
Analog-DFE-based 16Gb/s SerDes in 40nm CMOS that operates across 34dB loss channels at Nyquist with a baud rate CDR and 1.2Vpp voltage-mode driver. ISSCC 2011: 350-351
2000 – 2009
- 2003
- [c1]David M. Colleran, Clemenz L. Portmann, Arash Hassibi, César A. R. Crusius, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee, Maria del Mar Hershenson:
Optimization of phase-locked loop circuits via geometric programming. CICC 2003: 377-380
1990 – 1999
- 1999
- [j5]Bruno W. Garlepp, Kevin S. Donnelly, Jun Kim, Pak Shing Chau, Jared L. Zerbe, Charlie Huang, Chanh Tran, Clemenz L. Portmann, Donald Stark, Yiu-Fai Chan, Thomas H. Lee, Mark A. Horowitz:
A portable digital DLL for high-speed CMOS interface circuits. IEEE J. Solid State Circuits 34(5): 632-644 (1999) - [j4]Changhyun Kim, Kye-Hyun Kyung, W.-P. Jeong, J.-S. Kim, Byung-Sik Moon, Joon-Wan Chai, S.-M. Yim, Jung-Hwan Choi, K.-H. Han, C.-J. Park, Hong-Sun Hwang, H. Choi, Sung-Burn Cho, Clemenz L. Portmann, Soo-In Cho:
A 2.5-V, 72-Mbit, 2.0-GByte/s packet-based DRAM with a 1.0-Gbps/pin interface. IEEE J. Solid State Circuits 34(5): 645-652 (1999) - 1998
- [j3]Matthew M. Griffin, Jared Zerbe, Grace Tsang, Michael Ching, Clemenz L. Portmann:
A process-independent, 800-MB/s, DRAM byte-wide interface featuring command interleaving and concurrent memory operation. IEEE J. Solid State Circuits 33(11): 1741-1751 (1998) - 1996
- [j2]Clemenz L. Portmann, Teresa H. Y. Meng:
Power-efficient metastability error reduction in CMOS flash A/D converters. IEEE J. Solid State Circuits 31(8): 1132-1140 (1996) - 1995
- [j1]Clemenz L. Portmann, Teresa H. Y. Meng:
Metastability in CMOS library elements in reduced supply and technology scaled applications. IEEE J. Solid State Circuits 30(1): 39-46 (1995)
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