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Amir H. Salek

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Journal Articles

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2002
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Amir H. Salek, Jinan Lou, Massoud Pedram:
Hierarchical buffered routing tree generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5): 554-567 (2002)
1999
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Amir H. Salek, Jinan Lou, Massoud Pedram:
An integrated logical and physical design flow for deep submicron circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(9): 1305-1315 (1999)

Conference and Workshop Papers

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1999
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Amir H. Salek, Jinan Lou, Massoud Pedram:
MERLIN: Semi-Order-Independent Hierarchical Buffered Routing Tree Generation Using Local Neighborhood Search. DAC 1999: 472-478
1998
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Jinan Lou, Amir H. Salek, Massoud Pedram:
An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits. ASP-DAC 1998: 295-300
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Amir H. Salek, Jinan Lou, Massoud Pedram:
A DSM Design Flow: Putting Floorplanning, Technology-Napping, and Gate-Placement Together. DAC 1998: 128-134
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Amir H. Salek, Jinan Lou, Massoud Pedram:
A simultaneous routing tree construction and fanout optimization algorithm. ICCAD 1998: 625-630
1997
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Jinan Lou, Amir H. Salek, Massoud Pedram:
An exact solution to simultaneous technology mapping and linear placement problem. ICCAD 1997: 671-675

Coauthor Index

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