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Chetan D. Parikh
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2020 – today
- 2021
- [j5]Chinmaye Ramamurthy, Chetan D. Parikh, Subhajit Sen:
Deterministic Digital Calibration Technique for 1.5 bits/stage Pipelined and Algorithmic ADCs with Finite op-amp Gain and Large Capacitance Mismatches. Circuits Syst. Signal Process. 40(8): 3684-3702 (2021) - [c10]Chinmaye Ramamurthy, Chetan D. Parikh, Subhajit Sen:
Digital Calibration of 1.5 bits/stage Algorithmic ADC. ISOCC 2021: 3-4 - [c9]Chinmaye Ramamurthy, Chetan D. Parikh, Subhajit Sen:
Deterministic Digital Calibration of 1.5 bits/stage Pipelined ADCs by Direct Extraction of Calibration Coefficients. VLSID 2021: 29-34 - 2020
- [c8]Surya Padma, Sounak Das, Subhajit Sen, Chetan D. Parikh:
High Performance Operational Amplifier with 90dB Gain in SCL 180nm Technology. VDAT 2020: 1-5
2010 – 2019
- 2019
- [c7]Vamsi Krishna Guduru, Richa Gupta, Bhavani Lakshmi Polareddy, M. Anish Unnikrishnan, Chetan D. Parikh, Subhajit Sen:
Wake-up circuit for PAM4 receiver. ISED 2019: 1-6 - 2018
- [c6]Uma Mukund Kulkarni, Chetan D. Parikh, Subhajit Sen:
A Systematic Approach to Determining the Weights of the Capacitors in the DAC of a Non-binary Redundant SAR ADCs. VLSID 2018: 1-6 - 2017
- [c5]Pallavi G. Darji, Chetan D. Parikh:
A Calibration Technique for Current Steering DACs - Self Calibration with Capacitor Storage. VDAT 2017: 103-114 - 2016
- [j4]Pallavi G. Darji, Chetan D. Parikh:
Novel Analog Calibration Technique for Current-Steering DACs' Dynamic Performance. Circuits Syst. Signal Process. 35(7): 2616-2625 (2016) - [c4]Chetan D. Parikh, Gopal Agarwal:
New technique to improve transient response of LDO regulators without an off-chip capacitor. VDAT 2016: 1-5 - 2015
- [j3]Pallavi G. Darji, Chetan D. Parikh:
Novel Analog Calibration Technique for Current-Steering DACs. Circuits Syst. Signal Process. 34(8): 2407-2418 (2015) - [j2]A. Purushothaman, Chetan D. Parikh:
A New Delay Model and Geometric Programming-Based Design Automation for Latched Comparators. Circuits Syst. Signal Process. 34(9): 2749-2764 (2015) - [j1]A. Purushothaman, Chetan D. Parikh:
A low power low area capacitor array based Digital to Analog Converter architecture. Microelectron. J. 46(10): 928-934 (2015) - 2013
- [c3]Vivek Verma, Chetan D. Parikh:
A Low-Power Wideband High Dynamic Range Single-Stage Variable Gain Amplifier. VDAT 2013: 19-25 - [c2]Akhil Rathore, Chetan D. Parikh:
10 Gbps Current Mode Logic I/O Buffer. VDAT 2013: 59-65
2000 – 2009
- 2008
- [c1]Shagun Bajoria, Vineet Kumar Singh, Raju Kunde, Chetan D. Parikh:
Low power high bandwidth amplifier with RC Miller and gain enhanced feedforward compensation. ISLPED 2008: 193-196
Coauthor Index
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