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Books and Theses
- 1996
[b1]Bernd Wurth:
Logic synthesis with Boolean model. Technical University Munich, Germany, Shaker 1996, ISBN 978-3-8265-1918-5, pp. 1-157
Journal Articles
- 2022
- [j4]Elias G. Carayannis
, Evangelos Grigoroudis, Bernd Wurth:
OR for entrepreneurial ecosystems: A problem-oriented review and agenda. Eur. J. Oper. Res. 300(3): 791-808 (2022) - 1999
- [j3]Bernd Wurth, Ulf Schlichtmann, Klaus Eckl, Kurt Antreich:
Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs. ACM Trans. Design Autom. Electr. Syst. 4(3): 313-350 (1999) - 1998
- [j2]Christian Legl, Bernd Wurth, Klaus Eckl:
Computing support-minimal subfunctions during functional decomposition. IEEE Trans. Very Large Scale Integr. Syst. 6(3): 354-363 (1998) - 1996
- [j1]Peter H. Schneider, Ulf Schlichtmann, Bernd Wurth:
Fast Power Estimation of Large Circuits. IEEE Des. Test Comput. 13(1): 70-78 (1996)
Conference and Workshop Papers
- 2000
- [c11]Michael Münch, Norbert Wehn, Bernd Wurth, Renu Mehra, Jim Sproch:
Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths. DATE 2000: 624-631 - 1996
- [c10]Christian Legl, Bernd Wurth, Klaus Eckl:
A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs. DAC 1996: 730-733 - [c9]Bernhard Rohfleisch, Alfred Kölbl, Bernd Wurth:
Reducing Power Dissipation after Technology Mapping by Structural Transformations. DAC 1996: 789-794 - [c8]Christian Legl, Bernd Wurth, Klaus Eckl:
An Implicit Algorithm for Support Minimization during Functional Decomposition. ED&TC 1996: 412-419 - [c7]Matthias A. Senn, Peter H. Schneider, Bernd Wurth:
Power analysis for sequential circuits at logic level. EURO-DAC 1996: 22-27 - [c6]Christian Legl, Klaus Eckl, Bernd Wurth:
Performance-Directed Technology-Mapping for LUT-Based FPGAs - What Role Do Decomposition and Covering Play? FPL 1996: 14-23 - 1995
- [c5]Bernhard M. Riess, Heiko A. Giselbrecht, Bernd Wurth:
A new K-way partitioning approach for multiple types of FPGAs. ASP-DAC 1995 - [c4]Bernd Wurth, Klaus Eckl, Kurt Antreich:
Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm. DAC 1995: 54-59 - [c3]Bernhard Rohfleisch, Bernd Wurth, Kurt Antreich:
Logic Clause Analysis for Delay Optimization. DAC 1995: 668-672 - [c2]Bernd Wurth, Karl Fuchs:
A BIST approach to delay fault testing with reduced test length. ED&TC 1995: 418-423 - 1994
- [c1]Bernd Wurth, Norbert Wehn:
Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization. EDAC-ETC-EUROASIC 1994: 630-634
Coauthor Index
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