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2020 – today
- 2020
[j5]Chun-Chi Chen
, Chorng-Sii Hwang, Kai-Hsiang Chang:
All-Digital Cost-Efficient CMOS Digital-to-Time Converter Using Binary-Weighted Pulse Expansion. IEEE Trans. Very Large Scale Integr. Syst. 28(4): 1094-1098 (2020)
2010 – 2019
- 2017
- [j4]Ting-Li Chu, Sin-Hong Yu, Chorng-Sii Hwang:
Corrigendum to "High-Accuracy Programmable Timing Generator with Wide-Range Tuning Capability". VLSI Design 2017: 6898916:1 (2017) - 2015
- [c9]Ting-Li Chu, Wen-Yu Chu, Yasuyoshi Fujii, Chorng-Sii Hwang:
All-digital deskew buffer using a hybrid control scheme. SoCC 2015: 30-34 - 2014
- [j3]Chun-Chi Chen, Shih-Hao Lin, Chorng-Sii Hwang:
An Area-Efficient CMOS Time-to-Digital Converter Based on a Pulse-Shrinking Scheme. IEEE Trans. Circuits Syst. II Express Briefs 61-II(3): 163-167 (2014) - [c8]Chorng-Sii Hwang, Ting-Li Chu, Wen-Cheng Chen:
A clock generator based on multiplying delay-locked loop. SoCC 2014: 98-102 - 2013
- [j2]You-Gang Chen, Hen-Wai Tsao, Chorng-Sii Hwang:
A Fast-Locking All-Digital Deskew Buffer With Duty-Cycle Correction. IEEE Trans. Very Large Scale Integr. Syst. 21(2): 270-280 (2013) - [j1]Ting-Li Chu, Sin-Hong Yu, Chorng-Sii Hwang:
High-Accuracy Programmable Timing Generator with Wide-Range Tuning Capability. VLSI Design 2013: 803616:1-803616:6 (2013) - [c7]Wei-Lung Mao, Chorng-Sii Hwang, Chung-Wen Hung, Jyh Sheen, Po-Hung Chen:
Unambiguous BPSK-like CSC method for Galileo acquisition. MMAR 2013: 627-632 - [c6]Chorng-Sii Hwang, Ting-Li Chu, Po-Hsun Chen:
DLL-based programmable clock multiplier using differential toggle-pulsed latch. SoCC 2013: 239-243 - 2012
- [c5]Ting-Li Chu, Sin-Hong Yu, Chorng-Sii Hwang:
High-accuracy programmable timing generator with wide-range tuning capability. ISPACS 2012: 323-326
2000 – 2009
- 2009
- [c4]Chorng-Sii Hwang, Chun-Yung Cho, Chung-Chun Chen, Hen-Wai Tsao:
Dual-band CDR using a half-rate linear phase detector. SoCC 2009: 51-54 - 2008
- [c3]Chorng-Sii Hwang, Huan-Chun Li, Hen-Wai Tsao:
A spread spectrum clock generator using digital modulation scheme. SoCC 2008: 337-340 - 2004
- [c2]Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao:
A wide-range and fast-locking clock synthesizer IP based on delay-locked loop. ISCAS (1) 2004: 785-788 - 2003
- [c1]Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao:
A high-resolution and fast-conversion time-to-digital converter. ISCAS (1) 2003: 37-40
Coauthor Index
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