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Javier Granizo

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2020 – today

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2024
[c4]
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  dblp key:
  - conf/iscas/LoiG024
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Dante Loi, Javier Granizo, Luis Hernández:
A Scalable and PVT Invariant Spiking Neuron Using Asynchronous CMOS Logic. ISCAS 2024: 1-5
[i1]
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  - journals/corr/abs-2405-07887
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Victor Medina, Rubén Garvi, Javier Granizo, Pedro Amaral, Luis Hernández:
A Second-Order Audio VCO-ADC with 103-dB-A Dynamic Range and Binary-Weighted Internal Architecture. CoRR abs/2405.07887 (2024)
2023
[j1]
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  - journals/tcasII/GarviGGMWH23
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Rubén Garvi, Javier Granizo, Eric Gutierrez, Victor Medina, Andreas Wiesbauer, Luis Hernández:
A VCO-ADC Linearized by a Capacitive Frequency-to-Current Converter. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 1841-1845 (2023)
[c3]
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  - conf/aicas/GarciaGH23
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Diego Garcia, Javier Granizo, Luis Hernández:
Validation of a CMOS SNN network based on a time-domain threshold neuron circuit achieving 114.90 pJ/inference on MNIST. AICAS 2023: 1-5
[c2]
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  - conf/iscas/GranizoGG023
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Javier Granizo, Rubén Garvi, Diego Garcia, Luis Hernández:
A CMOS LIF neuron based on a charge-powered oscillator with time-domain threshold logic. ISCAS 2023: 1-5
2022
[c1]
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  - conf/icecsys/GarviGSH22
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Rubén Garvi, Javier Granizo, Angel Salvador, Luis Hernández:
A 55nm CMOS Linearized Oscillator for Audio VCO-ADCs achieving 78dBA of SNDR with $153\mu \mathrm{W}$. ICECS 2022 2022: 1-4

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