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Tetsuyuki Suzaki
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1990 – 1999
- 1996
- [j3]Fumihiko Sato, Hiroshi Tezuka, Masaaki Soda, Takasuke Hashimoto, Tetsuyuki Suzaki, Tom Tatsumi, Takenori Morikawa, Tsutomu Tashiro:
A 2.4 Gb/s receiver and a 1: 16 demultiplexer in one chip using a super self-aligned selectively grown SiGe base (SSSB) bipolar transistor. IEEE J. Solid State Circuits 31(10): 1451-1457 (1996) - [j2]Masakazu Kurisu, Makoto Kaneko, Tetsuyuki Suzaki, Akira Tanabe, Mitsuhiro Togo, Akio Furukawa, Takao Tamura, Ken Nakajima, Kazuyoshi Yoshida:
2.8-Gb/s 176-mW byte-interleaved and 3.0-Gb/s 118-mW bit-interleaved 8: 1 multiplexers with a 0.15-μm CMOS technology. IEEE J. Solid State Circuits 31(12): 2024-2029 (1996) - 1994
- [j1]Masaaki Soda, Hiroshi Tezuka, Fumihiko Sato, Takasuke Hashimoto, Satoshi Nakamura, Tom Tatsumi, Tetsuyuki Suzaki, Tsutomu Tashiro:
Si-analog IC's for 20 Gb/s optical receiver. IEEE J. Solid State Circuits 29(12): 1577-1582 (1994)
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