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Y. V. Sai Dinesh

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2023
[j1]
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  - journals/access/NimbekarDGHNA23
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  - https://dblp.org/rec/journals/access/NimbekarDGHNA23
Anagha Nimbekar, Y. V. Sai Dinesh, Arvind Gautam, Vidhumouli Hunsigida, Appa Rao Nali, Amit Acharyya:
Reconfigurable VLSI Design Architecture for Deep Learning Established Forelimb and Hindlimb Gesture Recognition for Rehabilitation Application. IEEE Access 11: 70061-70070 (2023)
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  - conf/mwscas/VattiDNA23
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Chandrasekhara Srinivas Vatti, Y. V. Sai Dinesh, Anagha Nimbekar, Amit Acharyya:
Digital Twin Based Fault-Tolerance Framework for RRAM Based Neural Computing Systems. MWSCAS 2023: 551-555
2022
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Anagha Nimbekar, Y. V. Sai Dinesh, Arvind Gautam, Vidhumouli Hunsigida, Appa Rao Nali, Amit Acharyya:
VLSI Architecture Design Methodology for Deep learning based Upper Limb and Lower Limb Movement Classification for Rehabilitation Application. LASCAS 2022: 1-4
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Anagha Nimbekar, Chandrasekhara Srinivas Vatti, Y. V. Sai Dinesh, Sunidhi Singh, Tarun Gupta, Ramesh Reddy Chandrapu, Amit Acharyya:
Low Complexity Reconfigurable-Scalable Architecture Design Methodology for Deep Neural Network Inference Accelerator. SOCC 2022: 1-6

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