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Eythan Familier

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2010 – 2019

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2017
[c2]
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  dblp key:
  - conf/cicc/FamilierG17
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  - https://dblp.org/rec/conf/cicc/FamilierG17
Eythan Familier, Ian Galton:
Second and third-order successive requantizers for spurious tone reduction in low-noise fractional-N PLLs. CICC 2017: 1-4
2016
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Eythan Familier, Ian Galton:
Second and Third-Order Noise Shaping Digital Quantizers for Low Phase Noise and Nonlinearity-Induced Spurious Tones in Fractional-N PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(6): 836-847 (2016)
2015
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Colin Weltin-Wu, Eythan Familier, Ian Galton:
A Linearized Model for the Design of Fractional-N Digital PLLs Based on Dual-Mode Ring Oscillator FDCs. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 2013-2023 (2015)
2013
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Eythan Familier, Ian Galton:
A Fundamental Limitation of DC-Free Quantization Noise With Respect To Nonlinearity-Induced Spurious Tones. IEEE Trans. Signal Process. 61(16): 4172-4180 (2013)
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Eythan Familier, Christian Venerus, Ian Galton:
A Class of Quantizers With DC-Free Quantization Noise and Optimal Immunity to Nonlinearity-Induced Spurious Tones. IEEE Trans. Signal Process. 61(17): 4270-4283 (2013)

2000 – 2009

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2009
[c1]
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Ali Vakili, Eythan Familier, Babak Hassibi:
On the eigendistribution of the steady-state error covariance matrix for the extended RLS algorithm. ICASSP 2009: 2829-2832

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